US 7,583,259 B2Granted

Power consumption of display apparatus during still image display mode

AssigneeSanyo Electric Co., Ltd.

InventorRyoichi Yokoyama

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Abstract

A plurality of gate lines (51) connected to a gate driver (50) for supplying gate signals and a plurality of drain lines (61) connected to a drain driver (60) for supplying drain signals are provided on a substrate (10). Pixels (200) are formed in the regions surrounded by these lines. Each of the pixels (200) includes a TFT (70), a storing circuit (110) connected to the source (11s) of the TFT (70) for storing a digital signal, and a signal selector (120) for selecting a signal A or signal B in response to the signal stored in the storing circuit (110) and supplying the selected signal to a display electrode (80). Once a digital signal corresponding to a display image is written to the storing circuit (110) of each pixel (200), an image can be continuously displayed, even when operation of the drivers (50,60) is stopped from the next frame, by continuing the operation of the storing circuit (110). Because the driver operation or the like can be suspended, overall power consumption can be reduced.

Claims13

Dependent claims

A display apparatus having a plurality of display pixels arranged over a substrate, in which, to each of the plurality of display pixels, a gate signal from a corresponding gate signal line and an image signal from a drain signal line provided in a direction intersecting with the gate line are supplied,

wherein each of the plurality of display pixels comprises:
a first display circuit having a signal storing circuit for storing a digital image signal supplied from the drain signal line in accordance with the gate signal;
and
a second display circuit provided adjacent to the first display circuit and having a storage capacitor for storing an analog image signal supplied from the drain signal line in accordance with the gate signal and supplying the signal stored in the storage capacitor to a display electrode;
and wherein
the first display circuit and the second display circuit are selectively switched in accordance with an image to be displayed,
a potential of a power source line for supplying a power source voltage to the signal storing circuit of the first display circuit is controlled to be at a low level during a period in which the second display circuit is selected, and
when the selection of the display circuit is switched from the second display circuit to the first display circuit, the potential of the power source line is controlled to be at a high level to operate the signal storing circuit;
wherein
the display apparatus further comprises a driver for driving each of the plurality of display pixels,
during a period in which an image in accordance with a digital image signal stored in the first display circuit of each of the plurality of display pixels is displayed in each display pixel, the operation of the driver is halted by stopping voltage supply to the driver,
the driver includes a gate driver for controlling the gate signal line, a drain driver for controlling the drain signal line, and a panel driving circuit for controlling the gate driver and the drain driver, and
during a period in which an image in accordance with a digital image signal stored in the first display circuit of each of the plurality of display pixels is displayed in each display pixel, the operations of the gate driver, the drain driver;
and the panel driving circuit are halted.

11 more elements

wherein each of the plurality of display pixels comprises:
a first display circuit having a signal storing circuit for storing a digital image signal supplied from the drain signal line in accordance with the gate signal;
a second display circuit provided adjacent to the first display circuit and having a storage capacitor for storing an analog image signal supplied from the drain signal line in accordance with the gate signal and supplying the signal stored in the storage capacitor to a display electrode;
and
a display circuit selector for selecting one of the first display circuit and the second display circuit in accordance with a circuit selector signal and connecting the display circuit which is selected to the drain signal line;
wherein
the display apparatus further comprises a driver for driving each of the plurality of display pixels,
during a period in which an image in accordance with a digital image signal stored in the first display circuit of each of the plurality of display pixels is displayed in each display pixel, the operation of the driver is halted by stopping voltage supply to the driver,
the driver includes a gate driver for controlling the gate signal line, a drain driver for controlling the drain signal line, and a panel driving circuit for controlling the gate driver and the drain driver, and
during a period in which an image in accordance with a digital image signal stored in the first display circuit of each of the plurality of display pixels is displayed in each display pixel, the operations of the gate driver, the drain driver, and the panel driving circuit are halted.

7 more elements

Dependencies are inferred from the claim text.

Facts

Application: 11/325,282Filed 3 Jan 2006 · continuation
Priority: JP 11-36712224 Dec 1999
Published: US 2006/0114213 A11 Jun 2006
Granted: 1 Sep 2009
Term ends: Not estimatedThe source records don’t support an estimate.

Classification11 codes

G09G 3/2011
Display of intermediate tones: by amplitude modulation
G09G 3/3648
Control of matrices with row and column drivers: using an active matrix
G09G 2300/0814
Several active elements per pixel in active matrix panels: used for selection purposes, e.g. logical AND for partial update
G09G 2300/0828
Several active elements per pixel in active matrix panels: forming a digital to analog [D/A] conversion circuit

Family

Application09/747,194Parent of this continuation · filed 22 Dec 2000
US 2006/0114213 A1Pre-grant publication · published 1 Jun 2006
US 7,019,726 B2Parent of this continuation
US 2001/0005193 A1Published application
US 7,583,259 B2This patent

From the US filing history. Foreign family members aren’t listed.