Gate driver for a display device and method of driving the same
AssigneeLG Display Co., Ltd.
InventorsKwang Soon Park, Soo Young Yoon, Min Doo Chun
Life of this patent
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Abstract
A gate driver for a display device includes a plurality of shift registers to sequentially generate output signals during a frame period in response to multi-phase clocks; and a dummy clock provided to the plurality of shift registers during a vertical blank time to reduce a stress voltage in the shift registers, wherein an output of each of the shift registers is reset to a low state power supply voltage by an output signal of the next shift register.
Claims17
A gate driver for a display device, comprising:
- a plurality of shift registers to sequentially generate output signals during a frame period in response to multi-phase clocks;
- and
- a dummy clock provided to the plurality of shift registers during a vertical blank time to reduce a stress voltage in the shift registers,
- wherein the dummy clock is simultaneously applied to all shift registers during the vertical blank time.
A method of driving a gate driver for a display device including a plurality of shift registers, the method comprising:
- applying multi-phase clocks to the plurality of shift registers to sequentially generate output signals during a single frame period;
- and
- applying a dummy clock to the shift resisters to reduce a stress voltage in the shift registers during a vertical blank time,
- wherein the dummy clock is simultaneously applied to all shift registers during the vertical blank time.
Dependencies are inferred from the claim text.