Test tray and handler using the test tray
AssigneeMirae Corporation
InventorsYong Sun Kim, Hyo Chul Yun, Dae Gon Yun
Life of this patent
Estimating the term…
Loading patent…
AssigneeMirae Corporation
InventorsYong Sun Kim, Hyo Chul Yun, Dae Gon Yun
Estimating the term…
A semiconductor chip test handler includes a first chamber in which packaged chips contained in a test tray are heated to high temperature or cooled to low temperature, a second chamber in which the packaged chips contained in the test tray are tested, and a third chamber in which the packaged chips contained in the test tray are cooled or heated to room temperature. The test trays are horizontally and/or vertically moved in an upright position between the first, second, and third chambers. The chambers may be arranged in a row or in a column. The test trays include a frame and a plurality of carriers into which the packaged chips are loaded. Connecting member and or projections are detachably mounted on lateral sides of the frame. A moving apparatus for moving the test trays between the first, second, and third chambers uses the connecting members and projections to push or pull the test trays into and out of the chambers.
A semiconductor test handler, comprising:
The semiconductor test handler of 1, wherein each at least one connecting member comprises a groove.
A test tray for use in a semiconductor test handler, comprising:
A test tray for use in a semiconductor test handler, comprising:
Dependencies are inferred from the claim text.