Plasma display panel driving circuit and plasma display apparatus
AssigneePanasonic Corporation
InventorSatoshi Ikeda
Life of this patent
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Abstract
A plasma display panel driving circuit for driving a plasma display panel which has a plurality of scan electrodes and sustain electrodes and operates as a capacitive load, by applying a different waveform in each of a reset period, address period and sustain period, includes a voltage multiplying circuit having a first input terminal to which 0 or a first voltage is inputted and a second input terminal to which a second voltage that is smaller than the first voltage is inputted. The voltage multiplying circuit is operable to generate a voltage prepared by adding the second voltage to a voltage equivalent to integral multiple of the first voltage.
Claims8
A plasma display panel driving circuit for driving a plasma display panel which has a plurality of scan electrodes and sustain electrodes and operates as a capacitive load, by applying a different waveform in each of a reset period, address period and sustain period, comprising:
- a voltage multiplying circuit having a first input terminal to which 0 or a first voltage is inputted and a second input terminal to which a second voltage that is smaller than the first voltage is inputted,
- wherein the voltage multiplying circuit is operable to generate a voltage prepared by adding the second voltage to a voltage equivalent to and integral multiple of the first voltage.
Dependencies are inferred from the claim text.