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US 7,582,947 B2Granted
High performance device design
AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorsChien-Chao Huang, Fu-Liang Yang
Life of this patent
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Abstract
A semiconductor structure having a recessed active region and a method for forming the same are provided. The semiconductor structure comprises a first and a second isolation structure having an active region therebetween. The first and second isolation structures have sidewalls with a tilt angle of substantially less than 90 degrees. The active region is recessed. By recessing the active region, the channel width is increased and device drive current is improved.
Claims18
A semiconductor structure comprising:
- a semiconductor substrate;
- a first and a second isolation region disposed in the substrate and defining a first active region in the semiconductor substrate therebetween, wherein the first and second isolation region have sidewalls with a tilt angle of substantially less than about 90 degrees;
- a gate dielectric in the first active region and over the semiconductor substrate;
- a gate electrode over the gate dielectric;
- a source/drain region substantially aligned with a sidewall of the gate electrode;
- a second active region in the semiconductor substrate, wherein the second active region has a top surface higher than a top surface of the first active region by a height difference of at least about 100 Å;
- an additional gate dielectric in the second active region and over the semiconductor substrate;
- an additional gate electrode over the additional gate dielectric;
- and
- an additional source/drain region substantially aligned with a sidewall of the additional gate electrode.
7 more elements
A semiconductor structure comprising:
- a semiconductor substrate;
- a first and a second isolation structure in the semiconductor substrate and having a first active region therebetween, wherein the first and the second isolation structures have sidewalls with a tilt angle of less than about 85 degrees;
- a third and a fourth isolation structure in the semiconductor substrate and having a second active region therebetween, wherein the second active region is higher than the first active region for a height difference greater than about 100 Å;
- a first gate dielectric in the first active region and over the semiconductor substrate;
- a first gate electrode over the first gate dielectric;
- and
- a first source/drain region substantially aligned with a sidewall of the first gate electrode.
4 more elements
Dependencies are inferred from the claim text.