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US 7,582,934 B2Granted
Isolation spacer for thin SOI devices
AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorsChih-Hsin Ko, Wen-Chin Lee, Yee-Chia Yeo, Chung-Hu Ke
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Abstract
A semiconductor device comprises a semiconductor mesa overlying a dielectric layer, a gate stack formed overlying the semiconductor mesa, and an isolation spacer formed surrounding the semiconductor mesa and filling any undercut region at edges of the semiconductor mesa.
Claims13
A semiconductor device, comprising:
- a semiconductor mesa;
- a dielectric centered under and adjacent to the semiconductor mesa, including undercut regions at outer portions of the dielectric such that a width of the dielectric is less than a width of the semiconductor mesa;
- a gate stack formed overlying the semiconductor mesa, the gate stack including sidewall spacer;
- and
- a source and a drain on either side of the gate stack, wherein portions of the source and drain further extend into and fill the undercut regions of the dielectric.
2 more elements
A semiconductor device, comprising:
- a semiconductor mesa overlying a dielectric layer;
- a gate dielectric formed overlying the semiconductor mesa;
- a gate electrode formed on the gate dielectric;
- and
- a source and a drain formed surrounding the semiconductor mesa wherein the source and drain are extended to substantially fill in an undercut formed in the dielectric layer, wherein the dielectric layer is in abutment with the semiconductor mesa and wherein the undercut laterally extends beneath the semiconductor mesa.
2 more elements
Dependencies are inferred from the claim text.