Electronic device including discontinuous storage elements

An electronic device comprising:

• a substrate including a first trench and a second trench that are spaced apart from each other;
• wherein each of the first and second trenches includes a wall and a bottom and extends from a primary surface of the substrate;
• a first doped region lying within the substrate along the bottom of the first trench;
• a second doped region lying within the substrate along the bottom of the second trench;
• a first dielectric layer lying along the walls and bottoms of the first and second trenches;
• discontinuous storage elements, wherein:
• a first portion of the discontinuous storage elements lie at least within the first trench;
• a second portion of the discontinuous storage elements lie at least within the second trench;
• and
• a third portion of the discontinuous storage elements overlie the primary surface of the substrate, wherein the third portion of the discontinuous storage elements is contiguous with each of the first and second portions of the discontinuous storage elements;
• a second dielectric layer adjacent to the discontinuous storage elements within the first and second trenches;
• a first gate electrode lying within the first trench and having an upper surface that lies below the primary surface of the substrate, wherein at least a part of the first portion of the discontinuous storage elements lies along the wall of the first trench at an elevation between the upper surface of the first gate electrode and the primary surface;
• a second gate electrode lying within the second trench and having an upper surface that lies below the primary surface of the substrate, wherein at least a part of the second portion of the discontinuous storage elements lies along the wall of the second trench at an elevation between the upper surface of the second gate electrode and the primary surface;
• a third dielectric layer including a first portion overlying the first gate electrode within the first trench and a second portion overlying the second gate electrode within the second trench;
• and
• a third gate electrode overlying at least one of the first gate electrode or the second gate electrode, wherein the third gate electrode lies at least partly within the first trench and the second trench.