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US 7,576,675 B1Granted
Return-to-zero current-steering DAC with clock-to-output isolation
AssigneesMegawin Technology Co., Ltd., National Cheng Kung University
InventorsDa-Huei Lee, Tai-Haur Kuo
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Abstract
A return-to-zero current-steering DAC is presented. The presented return-to-zero technique can isolate the analog output nodes of the DAC from the coupling of the control signals of the DAC without sacrificing speed. The topology uses a bank of return-to-zero circuits, which employs return-to-zero and isolation transistors to implement the presented return-to-zero technique.
Claims14
A current-steering digital-to-analog converter, comprising:
- a differential control signal generator to receive digital inputs and a clock signal for producing control signals, wherein said control signals depend on said digital inputs and said clock signal;
- a plurality of current sources for producing output currents;
- a plurality of switches connected to said plurality of current sources and controlled by said control signals;
- a plurality of isolation transistors connected between said plurality of switches and an analog output, wherein said plurality of isolation transistors are controlled by biased potentials to decouple said switches and said analog output;
- and
- a plurality of return-to-zero transistors connected between a return-to-zero potential node and connection nodes of said plurality of switches to said plurality of isolation transistors, wherein said plurality of return-to-zero transistors are controlled by return-to-zero control signals.
3 more elements
A current-steering digital-to-analog converter, comprising:
- a differential control signal generator to receive digital inputs and a clock signal for producing differential control signals, wherein said differential control signals depend on said digital inputs and said clock signal;
- current sources which produce output currents;
- one of first switches and one of second switches, which are connected to one of said current sources and controlled by said differential control signals;
- one of first isolation transistors, which is connected between a first analog output and one of said first switches, and one of second isolation transistors, which is connected between a second analog output and one of said second switches, wherein said first isolation transistors and said second isolation transistors are controlled by biased potentials to decouple the connections of said first switches and said first analog output and the connections of said second switches and said second analog output, respectively;
- and
- each of first return-to-zero transistors connected between a return-to-zero potential node and each of connection nodes of said first switches and said first isolation transistors, and each of second return-to-zero transistors connected between said return-to-zero potential node and each of connection nodes of said second switches and said second isolation transistors, wherein said first return-to-zero transistors and said second return-to-zero transistors are controlled by return-to-zero control signals.
3 more elements
Dependencies are inferred from the claim text.