Hybrid infrared detector array and CMOS readout integrated circuit with improved dynamic range

A hybrid imaging array comprising an array of infrared detector elements coupled to a CMOS readout integrated circuit having pixels arranged in a plurality of rows and columns, wherein at least two infrared (IR) detector elements are electrically coupled to a single corresponding pixel for each of the pixels in the CMOS readout integrated circuit;

• and wherein each of the pixels comprises:
• a) a first detector input node for receiving a signal from a first one of the two IR detector elements;
• b) a first relatively lower gain, wide dynamic range amplifier circuit responsive to a signal received at the first detector input node, the first circuit having a first sense node and a first amplifier, the first circuit optimized for a linear response to high light level input signals;
• c) a second detector input node for receiving a signal from a second one of the two IR detector elements;
• d) a second, independent, relatively higher gain, lower dynamic range amplifier circuit responsive to a signal received at the second detector input node, the second circuit having a second sense node and a second amplifier, the second circuit optimized to provide a high signal to noise ratio for low light level input signals;
• e) a first output select circuit for selectively directing the output of the first circuit to a first output multiplexer provided for the imaging array;
• f) a second, independent, output select circuit for selectively directing the output of the second independent circuit to a second output multiplexer provided for the imaging array;
• wherein separate outputs of the first and second circuits are provided for each of the individual pixels of the imaging array such that a signal from each of the first and second amplifier circuits can be independently and simultaneously read out from the pixel.

A method of imaging a scene with a hybrid imaging array comprising an array of infrared (IR) detectors and a CMOS readout integrated circuit having and array of pixels, each IR detector being electrically coupled to a corresponding pixel in the CMOS readout integrated circuit, where the pixels are arranged in a plurality of rows and columns, comprising performing the following steps in each pixel:

• a) directing scene illumination onto an IR detector in the array of IR detectors;
• b) supplying a signal from the IR detector to a detector input node;
• c) supplying charge from the detector input node through a first transfer gate to a relatively low gain, wide dynamic range amplifier circuit and generating a first output signal, the low gain, wide dynamic range amplifier circuit having a first sense node and a first amplifier, the low gain wide dynamic range amplifier circuit optimized for a linear response to high light level input signals;
• d) supplying charge from the detector input node through a second transfer gate to a relatively high gain, limited dynamic range amplifier circuit and generating a second output signal, the high gain limited dynamic range amplifier circuit having a second sense node and a second amplifier, the high gain limited dynamic range amplifier circuit optimized for a high signal to noise ratio for low light level input signals;
• and
• e) clocking a first output select gate and a second output select gate so as to separately transfer the first output signal and the second output signal to a first output multiplexer and a second output multiplexer, respectively, wherein the first and second output signals may be independently and simultaneously read out from the pixel.