Method and apparatus for dynamic power adjustment in a memory subsystem
AssigneeNVIDIA Corporation
InventorsThomas E. Dewey, Barry A. Wagner, Weijen Chao, Andrew R. Bell, David A. Bachman
Life of this patent
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Abstract
An aspect of the invention relates to a method of dynamically adjusting power consumption of a random access memory (RAM) coupled to a processor. Frequency of a memory clock signal coupled to the RAM is reduced. At least one supply voltage coupled to the RAM is reduced. At least one latency parameter of the RAM is configured in response to the reduced frequency and the reduced at least one supply voltage. The RAM may then be re-initialized. In this manner, voltage supplied to the RAM is reduced, thereby reducing power consumption in the RAM.
Claims20
A system for dynamically adjusting power consumption in a computing device, comprising:
- a random access memory (RAM) configured to receive a memory clock signal and a supply voltage;
- and
- a processor coupled to the RAM and configured to adjust a frequency of the memory clock signal, to adjust a value of a supply voltage, and to configure at least one latency parameter of the RAM for the adjusted frequency and the adjusted supply voltage.
A method of dynamically adjusting the power consumed by a random access memory (RAM) in a computing device, comprising:
- reducing a frequency of a memory clock signal coupled to the RAM;
- reducing a supply voltage coupled to the RAM;
- and
- configuring at least one latency parameter of the RAM in response to the reduced frequency and the reduced supply voltage.
A computer readable medium having stored thereon instructions that, when executed by a processor, cause the processor to perform a method of dynamically adjusting power consumption of a random access memory (RAM), comprising:
- sending a first command to reduce a frequency of a memory clock signal coupled to the RAM;
- sending a second command to reduce a supply voltage coupled to the RAM;
- and
- sending a third command to configure at least one latency parameter of the RAM in response to the reduced frequency and the reduced supply voltage.
Dependencies are inferred from the claim text.