Integrated circuit and method of operating such a circuit
AssigneeQimonda AG
InventorsDominique Savignac, Helmut Schneider
Life of this patent
Estimating the term…
Abstract
An integrated circuit includes a bit line pair having two bit lines, a sense amplifier having at least one transistor, the sense amplifier amplifying a charge difference between the bit lines of the bit line pair; and a control unit connected to a substrate terminal of the at least one transistor, the control unit applying a substrate potential dependent on an operating state of the integrated circuit to the substrate of the at least one transistor.
Claims38
An integrated circuit, comprising:
- a bit line pair having two bit lines;
- a sense amplifier having at least one transistor, the sense amplifier amplifying a charge difference between the bit lines of the bit line pair;
- and
- a control unit connected to a substrate terminal of the at least one transistor, the control unit applying a substrate potential, which is dependent on an operating state of the integrated circuit, to the substrate of the transistor.
A memory circuit, comprising:
- a bit line pair having two bit lines;
- a memory cell having a storage capacitor and a selection transistor, the selection transistor, upon activation, connecting the storage capacitor to one of the bit lines, thereby bringing about a charge difference between the bit lines of the bit line pair;
- a sense amplifier having at least one transistor, the sense amplifier amplifying a charge difference between the bit lines of the bit line pair;
- and
- a control unit connected to a substrate terminal of the at least one transistor, wherein the control unit is configured to apply a substrate potential dependent on an operating state of the memory circuit to the substrate of the transistor.
A method for operating an integrated circuit comprising a bit line pair having two bit lines, a memory cell having a storage capacitor and having a selection transistor, and a sense amplifier having at least one transistor, the method comprising:
- amplifying a charge difference between the bit lines of the bit line pair;
- and
- applying a substrate potential which is dependent on an operating state of the integrated circuit to the substrate of the transistor.
Dependencies are inferred from the claim text.