Apparatus of processing a signal in a memory device and a circuit of removing noise in the same
AssigneeHynix Semiconductor Inc.
InventorYong Deok Cho
Life of this patent
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Abstract
A circuit for removing noise from an input signal includes a falling edge signal delaying circuit configured to output a first delay output signal generated by delaying a falling edge of a first output signal for a preset time; a falling edge sensing circuit configured to sense the falling edge of the first output signal, and generate a pulse signal in accordance with the sense; a flip-flop configured to output the first delay output signal in accordance with an input clock signal; and a first logic operation circuit configured to perform a logic operation on an output signal of the flip-flop and the first output signal delayed for the preset time, thereby generating a second output signal.
Claims20
An apparatus for processing a signal in a memory device, the apparatus comprising:
- an input buffering section configured to amplify an input control signal to a digital level, and output a first output signal in accordance with the amplification;
- a noise sense removing circuit configured to sense a notch phenomenon or a glitch phenomenon occurring to the first output signal, remove the notch phenomenon or the glitch phenomenon, and output a second output signal in accordance with the removal, wherein the noise sense removing circuit comprises:
- a falling edge signal delaying circuit configured to delay a falling edge of the first output signal for a preset time, thereby outputting a first delay output signal;
- a falling edge sensing circuit configured to generate a pulse signal by sensing the falling edge of the first output signal;
- a flip-flop configured to output the first delay output signal in accordance with the clock signal, and operate using an output signal of the falling edge sensing circuit as a reset signal;
- and
- a first logic operation circuit configured to perform a logic operation on an output signal of the flip-flop and the first output signal delayed for the preset time, thereby generating the second output signal;
- and
- a clock generator configured to generate a clock signal using the second output signal.
A circuit for removing noise of an input signal, the circuit comprising:
- a falling edge signal delaying circuit configured to output a first delay output signal generated by delaying a falling edge of a first output signal for a preset time;
- a falling edge sensing circuit configured to sense the falling edge of the first output signal, and generate a pulse signal in accordance with the sensed falling edge;
- a flip-flop configured to output the first delay output signal in accordance with an input clock signal;
- and
- a first logic operation circuit configured to perform a logic operation on an output signal of the flip-flop and the first output signal delayed for the preset time, thereby generating a second output signal.
Dependencies are inferred from the claim text.