Device for reading out a memory cell including a regulating circuit with parallel switching elements, and method
AssigneeInfineon Technologies AG
InventorsEdvin Paparisto, Stephan Rogl
Life of this patent
Estimating the term…
Abstract
A method for reading out a memory cell, and a device to be used for reading out a memory cell. In one embodiment, the device includes a first circuit and a second circuit for regulating a voltage present at a line that is adapted to be connected with the memory cell to a predetermined value, wherein said first circuit includes a switching element, and wherein said first circuit is configured such that said switching element is switched on during a first regulating phase and is switched off during a second regulating phase.
Claims23
A device to be used for reading out a memory cell, comprising:
- a first circuit and a second circuit for regulating a voltage present at a line that is adapted to be connected with the memory cell to a predetermined value;
- wherein said first circuit comprises a switching element;
- and
- wherein said first circuit is configured such that said switching element is switched on during a first regulating phase and is switched off during a second regulating phase, and
- wherein, in parallel to said switching element of said first circuit, there is connected a further switching element that is connected or adapted to be connected with a memory cell state evaluation circuit.
A method for reading out a memory cell, comprising:
- regulating a voltage present at a line that is adapted to be connected with the memory cell to a predetermined value by using a first and a second circuit, wherein said first circuit comprises a switching element that is switched on during a first phase of voltage regulation;
- switching off said switching element during a second phase of voltage regulation;
- reading out said memory cell;
- and
- wherein, in parallel to said switching element of said first circuit, there is connected a further switching element that is connected or adapted to be connected with a memory cell state evaluator circuit, said further switching element being switched off during the first regulating phase and being switched on during the second regulating phase.
A memory comprising:
- a memory cell;
- and
- a device to be used for reading out a memory cell, comprising:
- a first circuit and a second circuit for regulating a voltage present at a line that is adapted to be connected with the memory cell to a predetermined value;
- wherein said first circuit comprises a switching element;
- wherein said first circuit is configured such that said switching element is switched on during a first regulating phase and is switched off during a second regulating phase;
- and
- wherein, in parallel to said switching element of said first circuit, there is connected a further switching element that is connected or adapted to be connected with a memory cell state evaluation circuit.
A device to be used for reading out a memory cell, comprising:
- means for providing a first circuit and means for providing a second circuit for regulating a voltage present at a line that is adapted to be connected with the memory cell to a predetermined value;
- wherein said first circuit means comprises a switching element;
- and
- wherein said first circuit means is configured such that said switching element is switched on during a first regulating phase and is switched off during a second regulating phase;
- and
- wherein, in parallel to said switching element of said first circuit, there is connected a further switching element that is connected or adapted to be connected with a memory cell state evaluation circuit.
A device to be used for reading out a memory cell, comprising:
- a first feedback regulating circuit;
- and
- a second feedback regulating circuit for regulating a voltage present ata a line that is adapted to be connected with the memory cell to a first predetermined value,
- wherein said first feedback regulating circuit comprises a switching element, and
- wherein said first feedback regulating circuit is configured such that said switching element is switched on during a first regulating phase and is switched off during a second regulating phase in reaction to the voltage present at the line reaching a second predetermined value.
Dependencies are inferred from the claim text.