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US 7,548,465 B2Granted
Low current consumption semiconductor memory device
AssigneeFujitsu Microelectronics Limited
InventorsShusaku Yamaguchi, Hiroyoshi Tomita
Life of this patent
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Abstract
A semiconductor memory device that includes an input buffer being inputted a write data from outside to buffer the write data and a control circuit putting the input buffer into an inactive state during a read operation and putting the input buffer into an active state when a read mask signal is inputted thereafter is provided.
Claims10
A semiconductor memory device comprising:
- a control circuit putting a clock signal for latch into an inactive state during a read operation and putting the clock signal for latch into an active state when a read data mask signal is inputted thereafter;
- a latch circuit to latch a write data inputted from outside in synchronization with the clock signal for latch;
- and
- a data terminal inputting the write data from outside to output a read data outside, wherein the read data mask signal is a signal to put said data terminal into a high-impedance state.
1 more element
Dependencies are inferred from the claim text.