Output buffer circuit and method with self-adaptive driving capability
AssigneeSTMicroelectronics S.r.l.
InventorsIgnazio Martines, Michele La Placa
Life of this patent
Estimating the term…
Abstract
An output buffer for providing a buffered current to a circuit load includes a plurality of operative stages, each one for generating a component of the buffered current and an enabling circuit for selectively enabling each operative stage. The output buffer further comprises at least one auxiliary stage and control means for measuring a control current that can be delivered by the at least one auxiliary stage and for activating the enabling means according to the measured control current.
Claims23
An output buffer for providing a buffered current to a circuit load, the output buffer comprising:
- a plurality of operative stages, each one for generating a current component of the buffered current;
- and
- enabling means for selectively enabling each operative stage;
- at least one auxiliary stage;
- and
- control means for measuring a control current supplied by the at least one auxiliary stage, the control means operable to cause the enabling means to selectively enable at least one operative stage according to the measured control current.
A method for providing a buffered current to a circuit load, the method comprising the steps of:
- generating a plurality of current components of the buffered current through corresponding operative stages;
- selectively enabling each operative stage by means of enabling means;
- and
- measuring a control current delivered by at least one auxiliary stage;
- wherein the enabling means selectively enables each operative stage according to the measured control current.
An output buffer operable to provide an output current on an output node adapted to be coupled to a load, the output buffer comprising:
- a plurality of operative stages, each operative stage configured to receive a corresponding active or inactive enable signal, and each operative stage operable to provide a portion of the output current when the enable signal is active and to disable providing the portion of the output current when the enable signal is inactive;
- and
- an enabling circuit coupled to the operative stages, the enabling circuit including an auxiliary stage having substantially the same configuration as each of the operative stages, and the enabling circuit operable to detect a control current provided by the auxiliary circuit and in response to the detected control current operable to selectively cause the enable signals applied to the operative stages to be active or inactive.
An electronic system, comprising:
- electronic circuitry including a system bus;
- and
- a plurality of output buffers having output nodes coupled to the system bus to provide an output current on the system bus, each output buffer including,
- a plurality of operative stages, each operative stage configured to receive a corresponding active or inactive enable signal, and each operative stage operable to provide a portion of the output current when the enable signal is active and to disable providing the portion of the output current when the enable signal is inactive;
- and
- an enabling circuit coupled to the operative stages, the enabling circuit including an auxiliary stage having substantially the same configuration as each of the operative stages, and the enabling circuit operable to detect a control current that can be provided by the auxiliary circuit and in response to the detected control current operable to selectively provide the active and inactive enable signals applied to the operative stages.
A method of controlling an output current to be provided on an output node, the method comprising:
- generating a plurality of output current portions, the sum of the output current portions being equal to the output current and a value of each output current portion being a function associated electrical parameters;
- generating a control current having a value that is a function of the same associated electrical parameters;
- comparing the control current to a reference current;
- and
- adjusting a number of generated output current portions responsive to the operation of comparing to thereby control the value of the output current.
Dependencies are inferred from the claim text.