Systems and methods for on-chip signaling
AssigneeThe Trustees of Columbia University in the City of New York
InventorsKenneth L. Shepard, Anup P. Jose
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Abstract
Systems and methods for on-chip signaling are disclosed. In some embodiments, an integrated circuit having on-chip signaling between a first component and a second component includes, a differential interconnect capable of coupling the first component to the second component, a driver capable of being coupled to the first component that sends data on the differential interconnect, a receiver capable of being coupled to the second component that receives the data, and a plurality of negative impedance converters capable of being coupled to the differential interconnect that provide loss compensation.
Claims17
An integrated circuit having on-chip signaling between a first component and a second component comprising:
- a differential interconnect coupling the first component to the second component;
- a driver coupled to the first component that sends data on the differential interconnect;
- a receiver coupled to the second component that receives the data;
- and
- a plurality of negative impedance converters coupled to the differential interconnect that provide loss compensation;
- and
- a data skew circuit coupled to the driver and a data de-skew circuit coupled to the receiver.
An integrated circuit having on-chip signaling between a first component and a second component comprising:
- a differential interconnect coupling the first component to the second component, wherein the differential interconnect has a co-planar waveguide topology;
- a driver coupled to the first component that sends data on the differential interconnect;
- a receiver coupled to the second component that receives the data;
- and
- a plurality of negative impedance converters coupled to the differential interconnect that provide loss compensation.
An integrated circuit having on-chip signaling between a first component and a second component comprising:
- a differential interconnect coupling the first component to the second component;
- a driver coupled to the first component that sends data on the differential interconnect;
- a receiver coupled to the second component that receives the data;
- and
- a plurality of negative impedance converters coupled to the differential interconnect that provide loss compensation;
- and
- a second driver at the first component, the driver and the second driver each providing a distinct drive current for sending data.
A method for on-chip signaling on an integrated circuit comprising:
- transmitting a data signal from a first component on the integrated circuit to a second component on the integrated circuit over a differential interconnect;
- providing a differential admittance to the data signal;
- and
- compensating for data skew between the first component and the second component.
A method for on-chip signaling on an integrated circuit comprising:
- transmitting a data signal from a first component on the integrated circuit to a second component on the integrated circuit over a differential interconnect;
- providing a differential admittance to the data signal;
- and
- adjusting the current level of the data signal based on a desired transmission rate.
An integrated circuit having on-chip signaling between a first component and a second component comprising:
- a means for differentially coupling the first component to the second component;
- a means for sending data on the means for differentially coupling located at the first component;
- a means for receiving the data at the second component;
- a plurality of means for providing loss compensation coupled to the means for differentially coupling;
- and
- a means for handling data skew between the means for sending data and the means for receiving data.
A method for on-chip signaling on an integrated circuit comprising:
- transmitting a data signal from a first component on the integrated circuit to a second component on the integrated circuit over a differential interconnect, wherein the differential interconnect has a co-planar waveguide topology;
- and
- providing a differential admittance to the data signal.
Dependencies are inferred from the claim text.