Scheme of level shifter cell

Abstract

A system having voltage level shifting capabilities, the system includes a logic circuit and a multiple level voltage supply circuit; wherein the logic circuit comprises at least one PMOS transistor and at least one NMOS transistor; wherein the logic circuit receives an input signal, receives a voltage supply signal from the multiple level voltage supply circuit, and outputs an output signal via a first node; wherein the input signal has a low voltage swing between a low level supply voltage and a rail voltage; wherein the output signal has a high voltage swing between a high level supply voltage and the rail voltage; and wherein the multiple level voltage supply circuit selects, in response to a level of the output signal, whether to provide to the supply node of the logic circuit a high level supply voltage or a low level supply voltage.

Dependencies are inferred from the claim text.