LPCVD gate hard mask
AssigneeApplied Materials, Inc.
InventorsRajesh Kanuri, Chorng-Ping Chang, Christopher Dennis Bencher, Hoiman Hung
Life of this patent
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Abstract
A gate hard mask is deposited on a gate structure using low pressure chemical vapor deposition (LPCVD). By doing so, the wet etch removal ratio (WERR) of the gate hard mask relative to the underlying polysilicon gate layer is increased when compared to prior art hard masks. The LPCVD gate hard mask will not only etch faster than prior art hard masks, but it will also reduce undercutting of the gate oxide. To provide additional control of the wet etch rate, the LPCVD hard mask can be annealed. The annealing can be tailored to achieve the desired etching rate.
Claims14
A method of forming a gate hard mask for a gate structure comprising:
- depositing a gate hard mask over a polysilicon gate layer by low pressure chemical vapor deposition, the gate hard mark selected from the group consisting of silicon oxide, silicon oxynitride, and silicon nitride;
- exposing the gate hard mask to N2O in a processing chamber;
- purging the processing chamber of N2O;
- plasma etching the polysilicon gate layer using the gate hard mask as a mask;
- and then
- wet etching the gate hard mask to remove the gate hard mask.
Dependencies are inferred from the claim text.