Manufacturing method of a semiconductor device to suppress generation of whiskers

#The present application claims priority from Japanese patent application No. 2005-268904 filed on Sep. 15, 2005, the content of which is hereby incorporated by reference into this application.

#The present invention relates to a manufacturing method of a semiconductor device, and particularly relates to a manufacturing method of a semiconductor device which suppresses a generation of the whisker leading to a short circuit defect of a lead in formation of the lead for external connection of the semiconductor device.

#In a manufacturing method of a semiconductor device of a resin molded type, in order to make it join to an external equipment good, a plating film is formed on a surface of the lead for external connection. A good solderability is obtained when the lead for external connection is connected with a mounting substrate etc. by forming this. As a material of a plating film, a Sn—Pb alloy which added Pb (lead) to Sn (tin) has been used widely. This alloy is excellent in wettability and can improve bond strength (for example, refer to Patent Reference 1).

#FIG. 1 is a drawing showing the manufacturing method of the semiconductor device concerning Embodiment 1 and 2;

#FIG. 2 is a drawing showing the manufacturing method of the semiconductor device concerning Embodiment 1 and 2;

#FIG. 3 is a drawing showing the manufacturing method of the semiconductor device concerning Embodiment 1 and 2;

#There will now be described embodiments of this invention with reference to accompanying drawings. In each drawing, the same numeral is given to the same or a corresponding portion, and the explanation is simplified or omitted.

#A manufacturing method of a semiconductor device concerning the embodiment is explained. First, although not illustrated, elements, such as a transistor, are formed on the main surface of a wafer. Next, dicing of the wafer is made and the wafer is cut into every semiconductor chip. FIG. 1 is a plan view of lead frame 1 for mounting the above-mentioned semiconductor chip and forming a semiconductor package. Lead frame 1 includes Fe (iron) and Ni (nickel), and is formed using an alloy (42Alloy) with which Ni was contained 42% (% of the weight). (Usually, although, as for the lead frame, a plurality of lead frames continue in a row in the shape of an array, only one lead frame is shown here.) Die pad 2 is formed in the central part of lead frame 1. A plurality of leads 3 are formed along the periphery of lead frame 1. Tie bar 4 is formed between die pad 2 and lead 3. Frame 5 is formed so that lead 3 may be surrounded, and lead 3 is supported. Suspension lead 6 is formed in the four corners of lead frame 1, and die pad 2 and frame 5 are connected.

#Next, as shown in FIG. 2, semiconductor chip 7 is mounted on die pad 2. Next, wire bonding of semiconductor chip 7 and lead 3 is made with metal wire 8. Next, the semiconductor chip 7 whole is covered so that a sealing metal mold (not shown) holds tie bar 4 from the front surface and the back surface of lead frame 1. Next, resin is injected into the inside of the sealing metal mold. At this time, the injected resin is dammed up by tie bar 4 and the injected resin does not flow into the outside of the sealing metal mold. Next, the sealing metal mold is removed. As a result, as shown in FIG. 3, sealing resin 9 covering semiconductor chip 7 (not shown) is formed.