Method of making circuitized substrate with solder paste connections
AssigneeEndicott Interconnect Technologies, Inc.
InventorsNorman A. Card, Thomas R. Miller, William J. Rudik
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AssigneeEndicott Interconnect Technologies, Inc.
InventorsNorman A. Card, Thomas R. Miller, William J. Rudik
Estimating the term…
A method of making a circuitized substrate assembly in which two or more subassemblies are aligned and bonded together. The bonding, preferably using lamination, results in effective electrical connections being formed between respective pairs of conductors of the subassemblies in such a manner that the metallurgies of the conductors, and those of an interim metallic solder paste, are effectively mixed and the flowable interim dielectric used between the mating subassemblies is forced to flow to engage and surround the conductor coupling, without adversely affecting the electrical connection formed.
A method of making a circuitized substrate assembly comprising:
Dependencies are inferred from the claim text.
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By laminating two or more circuit boards: the electrical connections between the circuit boards being made during lamination
Application of solder: application of solder paste, slurry or powder
Lamination: of previously made multilayered subassemblies
Lamination: of preperforated insulating layer
About 7 months of term left · ends 3 Jun 2027 (estimated)
This invention relates to organic circuitized substrates and particularly to those used for multilayered circuit boards, chip carriers, and the like. Even more particularly, the invention relates to the formation of such multilayered structures in which two or more circuitized subassemblies are formed and then bonded to each other.
As is known, multilayered printed circuit boards (PCBs), laminate chip carriers, and the like organic products permit formation of multiple circuits in a minimum volume or space. These typically comprise a stack of electrically conductive layers of signal, ground and/or power planes separated from each other by a layer of organic dielectric material. The planes may be in electrical contact with each other by plated holes passing through the dielectric layers. The plated holes are often referred to as “vias” if internally located, “blind vias” if extending a predetermined depth within the board from an external surface, or “plated-thru-holes” (PTHs) if extending substantially through the board's full thickness. By the term “thru-hole” as used herein is meant to include all three types of such board openings.
Today's methods for fabricating such PCBs, chip carriers and the like typically comprise fabrication of separate inner-layer circuits (circuitized layers), which are formed by coating a photosensitive layer or film over a copper layer of a copper clad inner-layer base material bonded (e.g., laminated) to a dielectric layer. The organic photosensitive coating is imaged, developed and the exposed copper is etched to form conductor lines, pads and the like, depending on the desired circuit pattern. After etching, the photosensitive film is stripped from the copper leaving the circuit pattern on the surface of the inner-layer base material. This processing is also referred to as photolithographic processing in the PCB art and further description is not deemed necessary. Following the formation of individual inner-layer circuits, each including at least one conductive layer and supporting dielectric layer, a multilayer “stack” (assembly) is formed by preparing a lay-up of several inner-layers, ground planes, power planes, etc., typically separated from each other by a dielectric, organic pre-preg typically comprising a layer of glass (typically fiberglass) cloth impregnated with a partially cured material, typically a B-stage epoxy resin. Such an organic material is also referred to in the industry as “FR-4” dielectric material. The top and bottom outer layers of the stack usually comprise copper clad, glass-filled, epoxy planar substrates with the copper cladding comprising exterior surfaces of the stack. The stack is laminated to form a monolithic structure (assembly) using heat and pressure to fully cure the B-stage resin. The stacked assembly so formed typically has metal (usually copper) cladding on both of its exterior surfaces. Exterior circuit layers are formed in the copper cladding using procedures similar to the procedures used to form the inner-layer circuits. A photosensitive film is applied to the copper cladding and the coating is then exposed to patterned activating radiation and developed. An etching solution such as cupric chloride is then used to remove copper bared by the development of the photosensitive film. Finally, the remaining photosensitive film is removed to provide the exterior circuit layers. The resulting assembly may include as many as thirty or more conductive layers and a corresponding number of dielectric layers, all laminated into the final stacked assembly in a simultaneous manner using conventional lamination processes.
FIG. 1 is a much enlarged, side elevational view, in section, of a metallic conductor pad mounted on a substrate and including a quantity of metallic solder paste thereon in accordance with one embodiment of the invention;
FIGS. 2-4 are side elevational views, partly in section and also on a much enlarged scale, illustrating the steps of the invention in accordance with one embodiment thereof; and
FIG. 5 is a side elevational view, on a smaller scale than FIGS. 1-4, illustrating two electrical assemblies each of which are capable of utilizing one or more of the circuitized substrate assemblies of the instant invention.
For a better understanding of the present invention, together with other and further objects, advantages and capabilities thereof, reference is made to the following disclosure and appended claims in connection with the above-described drawings. Like figure numbers will be used from FIG. to FIG. to identify like elements in these drawings.
By the term “circuitized substrate subassembly” as used herein is meant to include a substrate structure having at least one (and preferably more) dielectric layer(s) and at least one external conductive layer positioned on the dielectric layer and including a plurality of conductor pads as part thereof. The dielectric layer(s) may be made of one or more of the following dielectric materials: fiberglass-reinforced epoxy resin (“FR-4”), polytetrafluoroethylene (Teflon), polyimide, polyamide, cyanate resin, photo-imageable material, and other like materials. One example of such material known today is sold under the product name “RO2800” by Rogers Corporation, Rogers, Conn. (“RO2800” is a trademark of the Rogers Corporation.) The conductive layer(s) preferably serves as a signal layer to conduct electrical signals, including those of the high frequency type, and is preferably comprised of suitable metals such as copper, but may include or comprise additional metals (e.g., nickel, aluminum, etc.) or alloys thereof. Further examples will be described in greater detail herein-below. An example of one type of photo-imageable dielectric is ASMDF (Advanced Soldermask Dry Film). This composition, which is further described in U.S. Pat. No. 5,026,624, which issued Jun. 25, 1991, and U.S. Pat. No. 5,300,402, which issued Apr. 25, 1994, includes a solids content of from about 86.5 to about 89%, such solids comprising: about 27.44% PKHC, a phenoxy resin; 41.16% of Epirez 5183, a tetrabromobisphenol A; 22.88% of Epirez SU-8, an octafunctional epoxy bisphenol A formaldehyde novolac resin; 4.85% UVE 1014 photo-initiator; 0.07% ethylviolet dye; 0.03% FC 430, a fluorinated polyether nonionic surfactant from the 3M Company (having a place of business at 305 Sawyer Ave., Tonawanda, N.Y.); 3.85% Aerosil 380, an amorphous silicon dioxide from Degussa Corporation (having a business location at Interspace Parkway, Parsippany, N.J.), to provide the solid content. A solvent is present from about 11 to about 13.5% of the total photo-imageable dielectric composition.
By the term “circuitized substrate assembly” as used herein is meant to include a multilayered structure comprised of two or more such circuitized substrate subassemblies which are separately formed and bonded together. Additional dielectric and conductive layers may also be added to this final structure.