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US 7,525,379 B2Granted
Low voltage CMOS differential amplifier
AssigneeMicron Technology, Inc.
InventorsSugato Mukherjee, Yangsung Joo
Life of this patent
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Abstract
There is provided a device including a PMOS differential amplifier and an NMOS differential amplifier. The NMOS differential amplifier is coupled to the PMOS differential amplifier. The device is configured to operate as an inverter when a supply voltage is below a predetermined threshold.
Claims13
A device comprising:
- a PMOS differential amplifier;
- and
- an NMOS differential amplifier, wherein the NMOS differential amplifier is coupled to the PMOS differential amplifier and wherein the device is configured to operate as an inverter when a supply voltage is less than 1.3 volts.
A complementary differential input buffer comprising:
- a PMOS differential pair;
- and
- an NMOS differential pair coupled to the PMOS differential pair, wherein a first fixed bias tail current source transistor and a first voltage input transistor of the PMOS differential pair and a second fixed bias tail current source transistor and a second voltage input transistor of the NMOS differential pair combine to function as an inverter when a supply voltage is less than 1.3 volts.
A memory device comprising:
- an input buffer, wherein the input buffer comprises:
- a PMOS differential amplifier comprising first and second transistors configured to provide current to the PMOS differential amplifier, wherein the second transistor is configured to provide current to the PMOS differential amplifier if the first transistor is operating below a threshold level;
- and
- a NMOS differential amplifier coupled to the PMOS differential amplifier, the PMOS differential amplifier and the NMOS differential amplifier having a common output, wherein the NMOS differential amplifier comprises third and fourth transistors configured to provide current to the NMOS differential amplifier, the fourth transistor being configured to provide current to the NMOS differential amplifier if the third transistor is operating below the threshold level,
- wherein the input buffer operates as an inverter if a supply voltage for the first transistor of the PMOS differential amplifier and the third transistor of the NMOS differential amplifier is operating below 1.3 volts.
2 more elements
Dependencies are inferred from the claim text.