Resistance type memory device and fabricating method and operating method thereof
AssigneeMacronix International Co., Ltd.
InventorsMing-Daou Lee, Chia-Hua Ho, Erh-Kun Lai, Kuang-Yeu Hsieh
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Abstract
A resistance type memory device is provided. The resistance type memory device is disposed on a substrate and includes a tungsten electrode, an upper electrode, and a tungsten oxide layer. The upper electrode is disposed on the tungsten electrode. The tungsten oxide layer is sandwiched between the tungsten electrode and the upper electrode.
Claims27
A method for operating a resistance type memory comprising a plurality of resistance type memory devices, each of the resistance type memory devices being disposed on a substrate and comprising a tungsten electrode, an upper electrode disposed on the tungsten electrode, and a tungsten oxide layer sandwiched between the tungsten electrode and the upper electrode, comprising:
- applying a pulse voltage to each of the tungsten oxide layers so as to adjust a resistivity thereof, wherein
- each of the resistivities of each of the tungsten oxide layers refers to a first resistivity when no pulse voltage is applied to any of the tungsten oxide layers, and each of the resistance type memory devices is in a first storage state;
- each of the resistance type memory devices is programmed to be in a second storage state when each of the resistivities is adjusted to be a second resistivity;
- each of the resistance type memory devices is programmed to be in a third storage state when each of the resistivities is adjusted to a third resistivity;
- and
- each of the resistance type memory devices is programmed to be in a fourth storage state when each of the resistivities is adjusted to be a fourth resistivity, wherein the second resistivity is greater than the first resistivity, the first resistivity is greater than the third resistivity, and the third resistivity is greater than the fourth resistivity.
A method for operating a resistance type memory device disposed on a substrate and comprising a tungsten electrode, an upper electrode disposed on the tungsten electrode, and a tungsten oxide layer sandwiched between the tungsten electrode and the upper electrode, comprising:
- applying a first positive pulse voltage to the resistance type memory device when the resistance type memory device is in an initial state, so as to program the same to be in a first storage state;
- applying a second negative pulse voltage to the resistance type memory device when the resistance type memory device is in the first storage state, so as to program the same to be in a second storage state;
- applying a third negative pulse voltage to the resistance type memory device when the resistance type memory device is in the second storage state, so as to program the same to be in a third storage state;
- applying a fourth negative pulse voltage to the resistance type memory device when the resistance type memory device is in the third storage state, so as to program the same to be in a fourth storage state;
- and
- applying the first positive pulse voltage to the resistance type memory device when the resistance type memory device is in the fourth storage state, so as to program the same to be in the first storage state, wherein
- an absolute value of the second negative pulse voltage is less than that of the third negative pulse voltage, and the absolute value of the third negative pulse voltage is less than that of the fourth negative pulse voltage.
A method for operating a resistance type memory device disposed on a substrate and comprising a tungsten electrode, an upper electrode disposed on the tungsten electrode, and a tungsten oxide layer sandwiched between the tungsten electrode and the upper electrode, comprising:
- applying a first negative pulse voltage to the resistance type memory device when the resistance type memory device is in an initial state, so as to program the same to be in a first storage state;
- applying a second positive pulse voltage to the resistance type memory device when the resistance type memory device is in the first storage state, so as to program the same to be in a second storage state;
- applying a third positive pulse voltage to the resistance type memory device when the resistance type memory device is in the second storage state, so as to program the same to be in a third storage state;
- applying a fourth positive pulse voltage to the resistance type memory device when the resistance type memory device is in the third storage state, so as to program the same to be in a fourth storage state;
- and
- applying the first negative pulse voltage to the resistance type memory device when the resistance type memory device is in the fourth storage state, so as to program the same to be in the first storage state, wherein
- the second positive pulse voltage is less than the third positive pulse voltage, and the third positive pulse voltage is less than the fourth positive pulse voltage.
Dependencies are inferred from the claim text.