Method for determining position of semiconductor wafer, and apparatus using the same
AssigneeNitto Denko Corporation
InventorsSatoshi Ikeda, Masayuki Yamamoto
Life of this patent
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AssigneeNitto Denko Corporation
InventorsSatoshi Ikeda, Masayuki Yamamoto
Estimating the term…
A light source emits light toward a semiconductor wafer, and a light receiving sensor detects light passing a peripheral edge of the semiconductor wafer. Each coordinates of the peripheral edge of the semiconductor wafer is obtained from a result of the detection. Further, a center of the semiconductor wafer is obtained from a group of the coordinates. Then, an illumination device emits light toward the peripheral edge of the semiconductor wafer and an optical camera detects light reflected from the peripheral edge of the semiconductor wafer. A position of a “V”-shaped notch formed on the peripheral edge of the semiconductor wafer is obtained from a result of the detection. A handling position of the semiconductor wafer is determined based on the center of the semiconductor wafer and the position of the “V”-shaped notch.
A method for detecting a notch as a detection site for alignment formed on a peripheral edge of a semiconductor wafer having a protective sheet joined thereto, thereby determining a handling position of the semiconductor wafer, the method comprising:
A method for detecting a notch as a detection site for alignment formed on a peripheral edge of a semiconductor wafer having a protective sheet joined thereto, thereby determining a handling position of the semiconductor wafer, the method comprising:
An apparatus for detecting a notch as a detection site for alignment formed on a peripheral edge of a semiconductor wafer having a protective sheet joined thereto, thereby determining a handling position of the semiconductor wafer, the apparatus comprising:
An apparatus for detecting a notch as a detection site for alignment formed on a peripheral edge of a semiconductor wafer having a protective sheet joined thereto, thereby determining a handling position of the semiconductor wafer, the apparatus comprising:
Dependencies are inferred from the claim text.