US 7,511,592 B2 · Switch circuit and integrated circuit

Abstract

A switch circuit includes a balanced line connected between one end of an unbalanced line having another end connected to an input terminal and an output terminal and a balanced line connected between the one end of the unbalanced line and an output terminal. On each of the balanced lines, a plurality of quarter-wave transmission lines are connected in cascade, and each of a plurality of FETs, whose impedance is controllable, is connected between one pair of transmission lines constituting a balanced line for each interconnection point between the transmission lines, so that the power of a signal is distributed to both of the pair of transmission lines, and therefore the inputted power becomes half on each balanced line, thereby making it possible to prevent a DC-like current from flowing when the FET is in an off state even if a high frequency signal with high power is inputted.

Claims9

Dependent claims

A switch circuit, comprising:

an unbalanced line having one end connected to an input terminal;
a first balanced line connected between another end of said unbalanced line and a first output terminal;
and
a second balanced line connected between the other end of said unbalanced line and a second output terminal,
each of said first and second balanced lines including:
a plurality of quarter-wave transmission lines connected in cascade;
and
a plurality of controlled circuits, each of said controlled circuits being connected between one pair of transmission lines constituting said balanced line for each interconnection point between said quarter-wave transmission lines connected in cascade, and an impedance of said controlled circuit being controllable from outside.

5 more elements

Dependencies are inferred from the claim text.

Switch circuit and integrated circuit

Life of this patent

Switch circuit and integrated circuit

Life of this patent

Abstract

Claims9