Method for enhancing linearity of a transistor amplifier using switched capacitive loads
AssigneePMC-Sierra, Inc.
InventorsJurgen Hissen, Matthew W. McAdam
Life of this patent
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Abstract
A method and apparatus for linearizing the gain of a common-source field effect transistor (FET) amplifier. The method involves connecting a capacitive load in parallel with the gate of the FET through a switch, and opening and closing this switch depending on the voltage on the gate of the FET. The result is a FET amplifier circuit that has a substantially linear transcapacitance characteristic, making it a useful circuit for low-distortion high-power amplifiers such as xDSL line drivers.
Claims20
A field-effect transistor (FET) amplifier, comprising:
- at least one amplifying transistor;
- a switched capacitive load connected in parallel to a terminal of the amplifying transistor;
- and
- a comparator to control switching of the capacitive load to the terminal in response to a detected operating point of the amplifying transistor to substantially linearize gain of the amplifying transistor.
A method of linearizing the gain of a transistor amplifier, comprising:
- monitoring an operating point of an amplifying transistor;
- actively switching at least one capacitive electrical load in parallel with a terminal of the amplifying transistor in response to the operating point of the amplifying transistor.
Dependencies are inferred from the claim text.