Semiconductor device and method for manufacturing same
AssigneePanasonic Corporation
InventorsOsamu Kusumoto, Makoto Kitabatake, Kunimasa Takahashi, Kenya Yamashita, Ryoko Miyanaga, Masao Uchida
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AssigneePanasonic Corporation
InventorsOsamu Kusumoto, Makoto Kitabatake, Kunimasa Takahashi, Kenya Yamashita, Ryoko Miyanaga, Masao Uchida
Estimating the term…
An accumulation-mode MISFET comprises: a high-resistance SiC layer 102 epitaxially grown on a SiC substrate 101; a well region 103; an accumulation channel layer 104 having a multiple δ-doped layer formed on the surface region of the well region 103; a contact region 105; a gate insulating film 108; and a gate electrode 110. The accumulation channel layer 104 has a structure in which undoped layers 104b and δ-doped layers 104a allowing spreading movement of carriers to the undoped layers 104b under a quantum effect are alternately stacked. A source electrode 111 is provided which enters into the accumulation channel layer 104 and the contact region 105 to come into direct contact with the contact region 105. It becomes unnecessary that a source region is formed by ion implantation, leading to reduction in fabrication cost.
A semiconductor device comprising:
A method for fabricating a semiconductor device, said method comprising the steps of:
Dependencies are inferred from the claim text.