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US 7,504,889 B2Granted
Circuit for providing a signal boost
AssigneeFinisar Corporation
InventorsJason Y. Miao, Timothy G. Moran
Life of this patent
Estimating the term…
Abstract
Embodiments disclosed herein relate to an amplifier stage or circuit for providing a signal boost. The circuit includes an emitter-follower pair and a cross coupled differential pair. The cross coupled differential pair provides a feedback signal that provides a boost to a signal output by the emitter follower pair. In some embodiments, a capacitor of the cross coupled differential pair may be adjustable in order to vary the amount of boosting provided. In other embodiments, a current source of the cross coupled differential pair may be adjustable in order to vary the amount of boosting provided.
Claims23
A post-amplifier stage comprising:
- a first input node configured to receive a first data signal;
- a second input node configured to receive a second data signal that is complementary to the first data signal;
- a first output node;
- a second output node;
- a buffer stage having a first node coupled to the first input node, a second node coupled to the second input node, a third node coupled to the first output node, and a fourth node coupled to the second output node, wherein the buffer stage comprises:
- a first transistor having a base terminal coupled to the first input node, having an emitter terminal coupled to the first output node, and having a collector node configured to be connected to a voltage source when operational;
- and
- a second transistor having a base terminal coupled to the second input node, having an emitter terminal coupled to the second output node, and having a collector node configured to be connected to a voltage source when operational;
- and
- a programmable boost stage having a fifth node coupled to the first output node, a sixth node coupled to the second output node, a seventh node coupled to the first input node, and an eighth node coupled to the second input node, wherein the programmable boost stage is configured to adjust a signal at the seventh node or to adjust a signal at the eighth node.
7 more elements
A post-amplifier stage comprising:
- a first input node configured to receive a first data signal;
- a second input node configured to receive a second data signal that is complementary to the first data signal;
- a first output node;
- a second output node;
- a buffer stage having a first node coupled to the first input node, a second node coupled to the second input node, a third node coupled to the first output node, and a fourth node coupled to the second output node;
- and
- a programmable boost stage having a fifth node coupled to the first output node, a sixth node coupled to the second output node, a seventh node coupled to the first input node, and an eighth node coupled to the second input node, wherein the programmable boost stage is configured to adjust a signal at the seventh node or to adjust a signal at the eighth node, wherein the programmable boost stage comprises:
- a first transistor having a base terminal coupled to the first output node and having a collector terminal coupled to the second input node;
- a second transistor having a base terminal coupled to the second output node and having a collector terminal coupled to the first input node;
- a capacitor having a first terminal coupled to an emitter terminal of the first transistor and having a second terminal coupled to an emitter terminal of the second transistor;
- and
- at least one current source coupled to the emitter terminal of the first transistor and the emitter terminal of the second transistor;
- wherein the first and second transistors comprise a programmable differential pair that may be programmed to adjust a signal at the collector of the first transistor that is summed into the second data signal and to adjust a signal at the collector of the second transistor that is summed into the first data signal.
10 more elements
A circuit for providing a signal boost comprising:
- a first input node configured to receive a first data signal;
- a second input node configured to receive a second data signal that is complementary to the first data signal;
- a first output node;
- a second output node;
- a first transistor having a base terminal coupled to the first input node, having an emitter terminal coupled to the first output node, and having a collector node configured to be connected to a voltage source when operational;
- a second transistor having a base terminal coupled to the second input node, having an emitter terminal coupled to the second output node, and having a collector node configured to be connected to a voltage source when operational;
- a third transistor having a base terminal coupled to the first output node and the emitter terminal of the first transistor and having a collector terminal coupled to the second input node;
- a fourth transistor having a base terminal coupled to the second output node and the emitter terminal of the second transistor and having a collector terminal coupled to the first input node;
- a capacitor having a first terminal coupled to an emitter terminal of the third transistor and having a second terminal coupled to an emitter terminal of the fourth transistor;
- and
- at least one adjustable current source coupled to the emitter terminal of the third transistor and the emitter terminal of the fourth transistor.
8 more elements
A circuit for providing a signal boost comprising:
- a first input node configured to receive a first data signal;
- a second input node configured to receive a second data signal that is complementary to the first data signal;
- a first output node;
- a second output node;
- a first transistor having a base terminal coupled to the first input node, having an emitter terminal coupled to the first output node, and having a collector node configured to be connected to a voltage source when operational;
- a second transistor having a base terminal coupled to the second input node, having an emitter terminal coupled to the second output node, and having a collector node configured to be connected to a voltage source when operational;
- a third transistor having a base terminal coupled to the first output node and the emitter terminal of the first transistor and having a collector terminal coupled to the second input node;
- a fourth transistor having a base terminal coupled to the second output node and the emitter terminal of the second transistor and having a collector terminal coupled to the first input node;
- an adjustable capacitor having a first terminal coupled to an emitter terminal of the third transistor and having a second terminal coupled to an emitter terminal of the fourth transistor;
- and
- at least one current source coupled to the emitter terminal of the third transistor and the emitter terminal of the fourth transistor.
8 more elements
Dependencies are inferred from the claim text.