Apparatus, signal-processing circuit and device for magnetic recording system

A perpendicular magnetic recording/reproducing apparatus comprising:

• a perpendicular magnetic recording medium;
• a reproducing head which reproduces magnetized information recorded in the perpendicular magnetic recording medium;
• a waveform equalization circuit which performs a process of suppressing a low-frequency component including a direct current component in reproduced signals output from the reproducing head;
• and
• a decoder which decodes output signals output from the waveform equalization circuit,
• wherein said reproduced waveform corresponding to a pair of the closest two recording transitions recorded on said recording medium at a shortest bit length interval are outputted as a waveform having intersymbol interference with amplitude ratios P1, P2−αP1, . . . , Pk−αPk−1, . . . , PN−αPN−1, and −αPN wherein α is a value of a real number in a range of 0<α<1, k is an integer indicating bit time, P1, P2, . . . , Pk, . . . , and PN are real numbers with the same sign, and P1 and PN are non-zero real numbers and N>2 at each bit time through said partial response equalization circuit.

A perpendicular-magnetically recorded/reproduced signal processing circuit comprising:

• a waveform equalization circuit which performs a process of suppressing a low-frequency component including a direct current component in reproduced signals read from a perpendicular magnetic recording medium;
• and
• a decoder which decodes output signals output from the waveform equalization circuit,
• wherein said reproduced waveform corresponding to a pair of the closest two recording transitions recorded on said recording medium at a shortest bit length interval are outputted as a waveform having intersymbol interference with amplitude rations P1, P2−αP1, . . . , Pk−αPk−1, . . . , PN−αPN−1, and −αPN wherein α is a value of a real number in a range of 0<α<1, k is an integer indicating bit time, P1, P2, . . . , Pk, . . . , and PN are real numbers with the same sign, and P1 and PN are non-zero real numbers and N>2 at each bit time through said partial response equalization circuit.