Plasma pre-treating surfaces for atomic layer deposition
AssigneeASM America, Inc.
InventorsDevendra Kumar, Kamal Kishore Goundar, Nathanael R. C. Kemeling, Hideaki Fukuda, Hessel Sprey, Maarten Stokhof
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Abstract
Method and structures are provided for conformal lining of dual damascene structures in integrated circuits. Preferred embodiments are directed to providing conformal lining over openings formed in porous materials. Trenches are formed in, preferably, insulating layers. The layers are then adequately treated with a particular plasma process. Following this plasma treatment a self-limiting, self-saturating atomic layer deposition (ALD) reaction can occur without significantly filling the pores forming improved interconnects.
Claims46
A metallization process, comprising:
- forming trenches in a desired interconnect pattern in a low k insulating layer above a semiconductor substrate;
- treating an exposed surface of the trenches with a plasma process under conditions sufficient to improve a barrier property of a barrier layer compared to a barrier layer associated with a surface of trenches that have not undergone the plasma process, thereby forming a plasma processed surface, wherein the plasma process comprises a He/H2 plasma process;
- and
- after treating an exposed surface of the trenches with the plasma process, lining the surfaces of the trenches with the barrier layer by an atomic layer deposition (ALD) process, wherein the ALD process is performed directly over the plasma processed surface.
A method of making an integrated circuit comprising:
- plasma processing a surface of a low k insulating layer, wherein said plasma processing comprises the use of a hydrogen plasma that includes helium to process the surface, thereby producing a plasma processed surface;
- and
- after plasma processing the surface of the layer, lining said surface with a barrier layer deposited via atomic layer deposition (ALD), wherein the barrier layer comprises metal, carbon, and nitrogen, and wherein an interface between the surface and the barrier layer is relatively uniform in that the standard deviation of thickness of the barrier layer is less than about 5% of the mean of the thickness of the barrier, and wherein the ALD process is performed directly over the plasma processed surface.
A metallization process, comprising:
- forming trenches and vias in a desired interconnect pattern in a low k insulating layer above a semiconductor substrate;
- treating an exposed surface of the trench with a plasma process, thereby forming a plasma processed surface, wherein said plasma process comprises a H2/He plasma, and wherein said plasma process can treat substantially all of the exposed surfaces of the trenches;
- and
- after treating an exposed surface of the trench with the plasma process, lining the surfaces of the trench with the liner layer by an atomic layer deposition (ALD) process, wherein the ALD process is performed directly over the plasma processed surface.
Dependencies are inferred from the claim text.