Reducing power consumption of a microprocessor
AssigneeGenesis Microchip Inc.
InventorParag Naik
Life of this patent
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Abstract
Methods and apparatus, including computer program products, implementing and using techniques for reducing the power consumption of a microprocessor. One or more signal transitions in an instruction set of a microprocessor are profiled. A probability of occurrence is assigned to each instruction in the instruction set. A binary operation code is assigned to each instruction, based on the probability of occurrence for the instruction. The instructions having the highest probability of occurrence are assigned operation codes that require fewer signal transitions. As a result, the power consumption of the microprocessor is reduced.
Claims10
A computer-implemented method for reducing power consumption of a microprocessor, the method comprising:
- profiling one or more signal transitions associated with instructions in an instruction set of a microprocessor;
- assigning a probability of occurrence to each of one or more instructions in the instruction set;
- and
- assigning a binary operation code to at least one instruction of the one or more instructions in the instruction set based on the absolute probability of occurrence for the at least one instruction relative to the probabilities of occurrence of at least all of the other instructions of the one or more instructions, wherein instructions having the highest absolute probabilities of occurrence are assigned operation codes that require fewer signal transitions, whereby the power consumption of the microprocessor is reduced.
A computer program product, stored on a machine-readable storage device, comprising instructions operable to cause a computer to:
- profile one or more signal transitions associated with instructions in an instruction set of a microprocessor;
- assign a probability of occurrence to one or more instructions in the instruction set;
- and
- assign a binary operation code to at least one each instruction of the one or more instructions in the instruction set based on the absolute probability of occurrence for the at least one instruction relative to the probabilities of occurrence of at least all of the other instructions of the one or more instructions, wherein instructions having the highest absolute probabilities of occurrence are assigned operation codes that require the fewer signal transitions, whereby the power consumption of the microprocessor is reduced.
A microprocessor, comprising:
- a set of registers operable to temporarily store data during operation of the microprocessor;
- an arithmetic logic unit operable to execute arithmetic and logical operations of the microprocessor;
- and
- a control unit operable to interpret instructions contained in a program that is executed by the microprocessor, the instructions forming a subset of the microprocessor's instruction set architecture, each instruction in the microprocessor's instruction set architecture having a binary operation code that is assigned to the instruction based on the absolute probability of occurrence for the instruction during operation of the microprocessor.
Dependencies are inferred from the claim text.