Method and system for preventing current-privilege-level-information leaks to non-privileged code
AssigneeHewlett-Packard Development Company, L.P.
InventorBret McKee
Life of this patent
Estimating the term…
Abstract
Various embodiments of the present invention introduce privilege-level mapping into a computer architecture not initially designed for supporting virtualization. Privilege-level mapping can, with relatively minor changes to processor logic, fully prevent privileged-level-information leaks by which non-privilege code can determine the current machine-level privilege level at which they are executing. In one embodiment of the present invention, a new privilege-level mapping register is introduced, and privilege-level mapping is enabled for all but code invoked by privileged-level-0-forcing hardware events.
Claims9
A method for preventing non-privileged code from determining the machine-level, internal privilege level at which the non-privileged code is executing, the method comprising:
- introducing a privilege-level-mapping mechanism accessible only to code executing at a highest machine-level, internal privilege that maps virtual-privilege-level values to specified machine-level, internal privilege-level values;
- disabling the privilege-level mapping mechanism upon occurrence of a highest-machine-level-internal-privilege-forcing hardware event;
- and
- enabling the privilege-level mapping mechanism at completion of a highest-machine-level-internal-privilege-forcing hardware event.
A computer processor comprising:
- registers;
- instruction execution logic;
- memory bus interfaces;
- and
- a privilege-level-mapping mechanism accessible only to code executing at a highest machine-level, internal privilege that maps virtual-privilege-level values to specified machine-level, internal privilege-level values.
A method for providing a virtual machine environment by a virtual monitor running on a computer processor the method comprising:
- providing the computer processor including registers, instruction execution logic, memory bus interfaces;
- and a privilege-level-mapping mechanism accessible only to code executing at a highest machine-level, internal privilege that maps virtual-privilege-level values to specified machine-level, internal privilege-level values;
- using virtual-privilege-level mapping to map a highest virtual privilege level to a machine-level, internal privilege level less than a highest-machine-level-internal-privilege level;
- executing virtual monitor routines at highest-machine-level-internal-privilege level to trap all attempts by non-virtual-monitor code to execute privileged instructions or access privileged resources and emulate highest-machine-level-internal-privilege-level execution of privileged instructions and access to privileged resources.
Dependencies are inferred from the claim text.