Method and apparatus for executing packed shift operations

A machine readable medium having stored thereon a plurality of control signals and when accessed by a processor, causing said processor to:

• fetch a first packed shift control signal having a first format identifying a first packed shift operation and indicating a first shift count source:
• fetch a second packed shift control signal having a second format identifying a second packed shift operation and indicating a second shift count source;
• access one or more of a first set of control signals having a third format responsive to the first packed shift control signal;
• in response to said one or more of the first set of control signals to:
• access a first packed data having M times N bits, identify a first shift operation and a first count less than or equal to M, shill the first packed data by the first count of first positions, generate a first replacement data for one of the first positions, and produce a first shifted packed data comprising the first replacement data responsive to the first shift operation being identified;
• access one or more of a second set of control signals of the third format responsive to the second packed shift control signal;
• in response to said one or more of the second set of control signals to:
• access a second packed data having M times N bits, identify a second shift operation and a second count less than or equal to N, shift the second packed data by the second count of second positions, generate a second replacement data for one of the second positions, and produce a second shifted packed data comprising the second replacement data responsive to the second shift operation being identified.

A computer system comprising:

• a memory to store a shift control signal for shifting a first packed data by a number of shift positions;
• a processor to execute control signals;
• and
• a storage device having, stored thereon a plurality of control signals and when accessed by the processor, causing said processor to:
• access the shift control signal from the memory, the shift control signal identifying a first packed shift operation and having a first format permitting a first three-bit source address and a three-bit operation code extension to indicate whether the positions of the number of shift positions are byte positions or bit positions;
• responsive to the shift control signal, accessing one or more of a set of control signals of a second format;
• and
• responsive to said one or more of the set of control signals of the second format, accessing the first packed data having a set of data elements, shifting the first packed data by the number of shift positions according to the first packed shift operation, generating;
• a first replacement data for one of the number of positions, and producing a shifted first packed data comprising the first replacement data.