Method and apparatus to increase the usable memory capacity of a logic simulation hardware emulator/accelerator
AssigneeInternational Business Machines Corporation
InventorsThomas Michael Gooding, Roy Glenn Musselman
Life of this patent
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Abstract
A method, apparatus and program product are provided for increasing the usable memory capacity of a logic simulation hardware emulator. The present invention performs an additional logic synthesis operation during model build to transform an original logical array within a logic model into a transformed logical array, such that a row within the transformed logical array includes a plurality of merged logical array rows from the original logical array. The invention further modifies read and write port logic surrounding the transformed logical array during the logic synthesis operation to support read and write accesses during model emulation run time.
Claims19
A method for increasing the usable memory capacity of a logic simulation hardware emulator during an emulation run, the method comprising the steps of:
- transforming an original logical array within a logic model into a transformed logical array during a logic synthesis operation, wherein a row within the transformed logical array comprises a plurality of merged rows from the original logical array;
- modifying read and write port logic surrounding the transformed logical array during the logic synthesis operation to support read and write accesses during model emulation run time;
- loading the logic model and the modified read and write port logic into a physical memory of an emulation system residing within the logic simulation hardware emulator;
- executing an emulation run on the emulation system, wherein a host workstation reads from and writes to the transformed logical array within the emulation system via the modified read and write port logic, the emulation run producing a recalculated model state result;
- and
- providing the recalculated model state result from the emulation system to the host workstation.
A computer-readable program stored on a recordable computer-readable medium, the computer readable program providing a method of increasing the usable memory capacity of a logic simulation hardware emulator during an emulation run, the computer-readable program comprising the steps of:
- transforming an original logical array within a logic model into a transformed logical array during a logic synthesis operation, wherein a row within the transformed logical array comprises a plurality of merged rows from the original logical array;
- modifying read and write port logic surrounding the transformed logical array during the logic synthesis operation to support read and write accesses during model emulation run time;
- loading the logic model and the modified read and write port logic into a physical memory of an emulation system residing within the logic simulation hardware emulator;
- executing an emulation run on the emulation system, wherein a host workstation reads from and writes to the transformed logic array within the emulation system via the
- modified read and write port logic, the emulation run producing a recalculated model state result;
- and
- providing the recalculated model state result from the emulation system to the host workstation.
An apparatus for increasing the usable memory capacity of a logic simulation emulator during an emulation run the apparatus comprising:
- a host workstation;
- an emulation system having a physical memory, the emulation system electronically coupled to the host workstation;
- a logic synthesizer for synthesizing the logic model, wherein the logic synthesizer further comprises:
- an array transformer for transforming the original logical array such that a row within the transformed logical array contains a plurality of merged logical array rows from the original logical array;
- a port logic modifier for modifying the port logic surrounding the transformed logical array to support read and write accesses during model emulation run time;
- a symbol table generator for generating a symbol table used by a runtime controller during model emulation run time to properly address the transformed logical array;
- and
- a loader for loading the logic model into the physical memory of the emulation system;
- wherein the host workstation controls the emulation run on the emulation system, the host workstation reading from and writing to the transformed logical array via the modified read and write port logic utilizing the symbol table;
- and wherein a recalculated model state result is generated via the emulation run, and is returned from the emulation system to the host workstation.
Dependencies are inferred from the claim text.