Method of modeling and producing an integrated circuit including at least one transistor and corresponding integrated circuit

A system for modeling an integrated circuit including at least one insulated-gate field-effect transistor, said system comprising:

• a processor for implementing a program of instructions;
• a memory for storing the program of instructions;
• generator means configured to define a stress parameter representing mechanical stresses applied to an active area of the transistor;
• processing means being configured to determine at least one electrical parameters of the transistor at least partially based on the stress parameter;
• and
• output means for outputting the at least one electrical parameter of the transistor to a tangible computer readable medium or display,
• wherein the stress parameter comprises an equivalent geometrical parameter;
• and
• wherein the processing means is configured to determine the at least one electrical parameter of the transistor using an equation involving at least:
• the at least one electrical parameter determined for a reference distance,
• the reference distance,
• the stress parameter of the transistor, and
• a coefficient associated with the at least one electrical parameter and depending on a width and a length of a channel of the transistor.

A computer implemented method of producing an integrated circuit including at least one insulated-gate field-effect transistor, said method comprising:

• determining at least one electrical parameter of the transistor using a modeling method that includes:
• defining a stress parameter representing mechanical stresses applied to an active area of the transistor wherein the stress parameter comprises an equivalent geometrical parameter;
• determining the least one electrical parameter of the transistor taking into account the stress parameter;
• defining a geometry of the active area of the transistor based on a value of the at least one electrical parameter;
• and
• fabricating the transistor such that the active area of the transistor has the geometry that was defined,
• producing the integrated circuit including the transistor, the active area of the transistor having the geometry that was defined;
• wherein the determining the at least one electrical parameter of the transistor is performed using an equation involving at least:
• the at least one electrical parameter determined for a reference distance,
• the reference distance,
• the stress parameter of the transistor, and
• a coefficient associated with the at least one electrical parameter and depending on a width and a length of a channel of the transistor.

An integrated circuit including at least one insulated-gate field-effect transistor comprising:

• an active area of the transistor including a useful active area defined as a portion or the whole of the active area of the transistor;
• a distance aeq in a direction of a length of a channel of the transistor between a gate of the transistor and an edge of the useful active area is different from a required minimum distance amin for a contact terminal on the active area;
• and
• a geometry of the active area of the transistor defined based on a value of at least one electrical parameter,
• wherein the electrical parameter is determined taking into account a stress parameter representing mechanical stress applied to the active area of the transistor, wherein the stress parameter represents the distance in the direction of the length of the channel of the transistor between the gate of the transistor and the edge of the useful active area;
• and
• the transistor fabricated such that the active area has the geometry so defined.

A computer readable storage medium comprising a program of computer executable instructions for modeling an integrated circuit including at least one insulated-gate field-effect transistor, said program including instructions for:

• defining a stress parameter representing mechanical stresses applied to an active area of the transistor;
• determining at least one electrical parameter of the transistor taking into account the stress parameter;
• and
• outputting the at least one electrical parameter to a tangible computer readable medium or display, wherein the stress parameter comprises an equivalent geometrical parameter;
• and
• wherein the determining the at least one electrical parameter of the transistor is performed using an equation involving at least:
• the at least one electrical parameter determined for a reference distance,
• the reference distance,
• the stress parameter of the transistor, and
• a coefficient associated with the at least one electrical parameter and depending on a width and a length of a channel of the transistor.

A computer implemented method of modeling an integrated circuit including at least one insulated-gate field-effect transistor, said method including:

• defining a stress parameter representing mechanical stresses applied to an active area of the transistor, the stress parameter comprising an equivalent geometrical parameter;
• defining a useful active area of the transistor as some or the whole of the active area, the stress parameter representing at least one distance in a direction of a length of a channel of the transistor between a gate of the transistor and an edge of the useful active area;
• determining at least one electrical parameter of the transistor taking into account the stress parameter;
• and
• outputting the at least one electrical parameter of the transistor to a tangible computer readable medium or display.

A system for modeling an integrated circuit including at least one insulated-gate field-effect transistor, said system comprising:

• a processor for implementing a program of instructions;
• a memory for storing the program of instructions;
• generator means configured to define a stress parameter representing mechanical stresses applied to an active area of the transistor, the stress parameter comprising an equivalent geometrical parameter;
• processing means being configured to determine at least one electrical parameter of the transistor at least partially based on the stress parameter;
• and
• output means for outputting the at least one electrical parameter of the transistor to a tangible computer readable medium or display,
• wherein the generator means is configured to define a useful active area as some or the whole of the active area, and
• the stress parameter represents at least one distance in a direction of a length of a channel of the transistor between a gate of the transistor and an edge of the useful active area.

A computer implemented method of producing an integrated circuit including at least one insulated-gate field-effect transistor, said method comprising:

• determining at least one electrical parameter of the transistor using a modeling method that includes:
• defining a stress parameter representing mechanical stresses applied to an active area of the transistor, the stress parameter comprising an equivalent geometrical parameter;
• defining a useful active area of the transistor as some or the whole of the active area, the stress parameter representing at least one distance in a direction of a length of a channel of the transistor between a gate of the transistor and an edge of the useful active area;
• and
• determining the least one electrical parameter of the transistor taking into account the stress parameter;
• defining a geometry of the active area of the transistor based on a value of the at least one electrical parameter;
• fabricating the transistor such that the active area of the transistor has the geometry that was defined;
• and
• producing the integrated circuit including the transistor, the active area of the transistor having the geometry that was defined.

A computer readable storage medium comprising a program of computer executable instructions for modeling an integrated circuit including at least one insulated-gate field-effect transistor, said program including instructions for:

• defining a stress parameter representing mechanical stresses applied to an active area of the transistor, the stress parameter comprising an equivalent geometrical parameter;
• defining a useful active area of the transistor as some or the whole of the active area, the stress parameter representing at least one distance in a direction of a length of a channel of the transistor between a gate of the transistor and an edge of the useful active area;
• determining at least one electrical parameter of the transistor taking into account the stress parameter;
• and
• outputting the at least one electrical parameter to a tangible computer readable medium or display.

A computer implemented method of modeling an integrated circuit including at least one insulated-gate field-effect transistor, said method including:

• receiving a layout diagram of the transistor;
• defining a stress parameter representing mechanical stresses applied to an active area of the transistor the stress parameter comprising an equivalent geometrical parameter;
• defining a useful active area of the transistor as some or the whole of the active area, the stress parameter representing at least one distance in a direction of a length of a channel of the transistor between a gate of the transistor and an edge of the useful active area;
• determining at least one electrical parameter of the transistor taking into account the stress parameter;
• and
• outputting the at least one electrical parameter to a tangible computer readable medium or display,
• wherein defining the stress parameter comprises producing the stress parameter from the layout diagram of the transistor.