High speed logic level shifter
AssigneeSupertex, Inc.
InventorsJames T. Walker, Jimes Lei
Life of this patent
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Abstract
A circuit for transmitting logic signals across a high voltage barrier has a logic signal buffer with true and complement state differential outputs. A binary flip-flop with set and reset inputs is further provided. A first coupling capacitor is coupled to the true buffer output and to the set input of the binary flip-flop. A second coupling capacitor is coupled to the complement buffer output and to the reset input of the binary flip-flop circuit.
Claims19
A circuit for transmitting logic signals across a high voltage barrier comprising:
- a logic signal buffer with true and complement state differential outputs;
- a binary flip-flop with set and reset inputs;
- a first coupling capacitor coupled to the true buffer output and to the set input of the binary flip-flop;
- a second coupling capacitor coupled to the complement buffer output and to the reset input of the binary flip-flop circuit;
- a reset signal circuit coupled to the logic signal buffer for setting the circuit to a known initial state;
- and
- a logic gate for preventing a flow of input signal information during times a reset signal is active.
A circuit for transmitting logic signals across a high voltage barrier comprising:
- a logic signal buffer with true and complement state differential outputs;
- a binary flip-flop with set and reset inputs,
- a first coupling capacitor coupled to the true buffer output and to the set input of the binary flip-flop;
- a second coupling capacitor coupled to the complement buffer output and to the reset input of the binary flip-flop circuit;
- a reset signal circuit coupled to the logic signal buffer for setting the circuit to a known initial state;
- and
- a power supply under voltage detection circuit to provide said reset signal.
A circuit for transmitting logic signals across a high voltage barrier comprising:
- a logic signal buffer with true and complement state differential outputs;
- a binary flip-flop with set and reset inputs;
- a first coupling capacitor coupled to the true buffer output and to the set input of the binary flip-flop;
- a second coupling capacitor coupled to the complement buffer output and to the reset input of the binary flip-flop circuit;
- and
- means for detecting a rate of change of at least one circuit power supplies, and providing a reset signal whenever a power supply voltage rate of change exceeds a chosen value.
A circuit for transmitting logic signals across a high voltage barrier comprising:
- a logic signal buffer with true and complement state differential outputs;
- a binary flip-flop with set and reset inputs;
- a first coupling capacitor coupled to the true buffer output and to the set input of the binary flip-flop;
- a second coupling capacitor coupled to the complement buffer output and to the reset input of the binary flip-flop circuit;
- and
- a logic comparison circuit having a first input coupled to the logic signal buffer and a second input coupled to the binary flip- flop output.
Dependencies are inferred from the claim text.