Semiconductor device including A/D converter

A semiconductor device comprising:

• an A/D converter;
• a digital processing circuit for performing processing based on conversion results from the A/D converter;
• and
• a test circuit for checking a nonlinearity error (INLE) of the conversion results from the A/D converter,
• wherein the test circuit includes:
• an averaging circuit for averaging the conversion results obtained by the A/D converter by making conversions for a predetermined period of time or for a certain number of outputs,
• a storage circuit for storing an output result from the averaging circuit, and
• a test output terminal for externally outputting data stored in the storage circuit;
• and
• the test circuit externally outputs the data stored in the storage circuit from the test output terminal, after the conversions made by the A/D converter for the predetermined period of time or for the certain number of outputs are completed,
• the test circuit further includes an ideal value subtraction circuit for subtracting a predetermined ideal value from the output result from the averaging circuit, and
• the storage circuit stores an output from the ideal value subtraction circuit, instead of the output result from the averaging circuit or the output result from the adder.

A semiconductor device comprising:

• an A/D converter;
• a digital processing circuit for performing processing based on conversion results from the A/D converter;
• and
• a test circuit for checking a nonlinearity error (INLE) of the conversion results from the A/D converter,
• wherein the test circuit includes:
• an adder for adding the conversion results obtained by the A/D converter by making conversions for a predetermined period of time or for a certain number of outputs,
• a storage circuit for storing an output result from the adder, and
• a test output terminal for externally outputting data stored in the storage circuit;
• and
• the test circuit externally outputs the data stored in the storage circuit from the test output terminal, after the conversions made by the A/D converter for the predetermined period of time or for the certain number of outputs are completed,
• the test circuit further includes an ideal value subtraction circuit for subtracting a predetermined ideal value from the output result from the adder, and
• the storage circuit stores an output from the ideal value subtraction circuit, instead of the output result from the adder.