Class D amplifier and infrared data receiving apparatus using the same
AssigneeSharp Kabushiki Kaisha
InventorTakahiro Inoue
Life of this patent
Estimating the term…
Abstract
A class D amplifier includes: an amplifier circuit in which a high side switching element and a low side switching element are connected in series between power sources; a high side gate driving circuit for driving a high side gate of the high side switching element; and a low side gate driving circuit for driving a low side gate of the low side switching element. In the class D amplifier, the high side gate driving circuit is configured so that a charging time of the high side gate is shorter than a discharging time of the high side gate, and the low side gate driving circuit is configured so that a charging time of the low side gate is longer than a discharging time of the low side gate.
Claims14
A class D amplifier, comprising:
- an amplifier circuit in which a high side switching element and a low side switching element are connected in series between power sources;
- a high side gate driving circuit including a first inverter circuit, for driving a high side gate of the high side switching element;
- and
- a low side gate driving circuit including a second inverter circuit, for driving a low side gate of the low side switching element,
- wherein
- the high side gate driving circuit and the low side gate driving circuit are configured so that a charging time of the high side gate is set to be shorter than a discharging time of the high side gate, and a charging time of the low side gate is set to be longer than a discharging time of the low side gate.
A class D amplifier, comprising:
- an amplifier circuit in which a high side switching element and a low side switching element are connected in series between power sources;
- a high side gate driving circuit for driving a high side gate of the high side switching element;
- and
- a low side gate driving circuit for driving a low side gate of the low side switching element,
- wherein
- the high side gate driving circuit and the low side gate driving circuit are configured so that a charging time of the high side gate is set to be shorter than a discharging time of the high side gate, and a charging time of the low side gate is set to be longer than a discharging time of the low side gate,
- the high side gate driving circuit includes an inverter circuit in which a ratio of a gate width to a gate length of an nMOS transistor is set so as to be smaller than a ratio of a gate width to a gate length of a pMOS transistor, and
- the low side gate driving circuit includes an inverter circuit in which a ratio of a gate width to a gate length of a pMOS transistor is set so as to be smaller than a ratio of a gate width to a gate length of an nMOS transistor.
A class D amplifier, comprising:
- an amplifier circuit in which a high side switching element and a low side switching element are connected in series between power sources;
- a high side gate driving circuit for driving a high side gate of the high side switching element;
- a low side gate driving circuit for driving a low side gate of the low side switching element;
- and
- a delay time providing circuit for providing a predetermined delay time (i) during a period from a rising edge of a potential of the high side gate to a rising edge of a potential of the low side gate and (ii) during a period from a falling edge of the potential of the low side gate to a falling edge of the potential of the high side gate, where
- the high side gate driving circuit and the low side gate driving circuit are configured so that a charging time of the high side gate is set to be shorter than a discharging time of the high side gate, and a charging time of the low side gate is set to be longer than a discharging time of the low side gate.
A class D amplifier, comprising:
- two amplifier circuits each including a high side switching element and a low side switching element connected in series between power sources;
- two driving circuits each including (i) a high side gate driving circuit for driving a high side gate of the high side switching element and (ii) a low side gate driving circuit for driving a low side gate of the low side switching element, the high side gate driving circuit and the low side gate driving circuit being configured so that a charging time of the high side gate is set to be shorter than a discharging time of the high side gate, and a charging time of the low side gate is set to be longer than a discharging time of the low side gate;
- and
- an inverter circuit for inverting an input signal to be inputted to one of the two driving circuits.
An apparatus for receiving infrared data, comprising
- a receiving section for receiving audio data which is transmitted in a form of an infrared pulse signal, and
- an amplifier for amplifying an output from the receiving section,
- wherein
- the amplifier is a class D amplifier which includes:
- an amplifier circuits in which a high side switching element and a low side switching element are connected in series with power sources;
- a high side gate driving circuit including a first inverter for driving a high side gate of the high side switching element;
- and a low side gate driving circuit including a second inverter for driving a low side gate of the low side switching element, the high side gate driving circuit and the low side gate driving circuit being configured so that a charging time of the high side gate is set to be shorter than a discharging time of the high side gate, and a charging time of the low side gate is set to be longer than a discharging time of the low side gate.
An apparatus for receiving infrared data, comprising:
- a receiving section for receiving audio data which is transmitted in a form of an infrared pulse signal, and
- an amplifier for amplifying an output from the receiving section,
- wherein
- the amplifier is a class D amplifier which includes:
- an amplifier circuits in which a high side switching element and a low side switching element are connected in series with power sources;
- a high side gate driving circuit for driving a high side sate of the high side switching element;
- and a low side gate diving circuit for driving a low side gate of the low side switching element the high side gate driving circuit and the low side gate driving circuit being configured so that a charging time of the high side gate is set to be shorter than a discharging time of the high side gate, and a charging time of the low side gate is set to be longer than a discharging time of the low side gate,
- the high side gate driving circuit includes an inverter circuit in which a ratio of a gate width to a gate length of an nMOS transistor is set so as to be smaller than a ratio of a gate width to a gate length of a pMOS transistor, and
- the low side gate driving circuit includes an inverter circuit in which a ratio of a gate width to a gate length of a pMOS transistor is set so as to be smaller than a ratio of a gate width to a gate length of an nMOS transistor.
An apparatus for receiving infrared data, comprising:
- a receiving section for receiving audio data which is transmitted in a form of an infrared pulse signal, and
- an amplifier for amplifying an output from the receiving section, wherein the amplifier further includes a delay time providing circuit for providing a predetermined delay time (i) during a period from a rising edge of a potential of the high side gate to a rising edge of a potential of the low side gate and (ii) during a period from a falling edge of the potential of the low side gate to a falling edge of the potential of the high side gate, and
- wherein the amplifier is a class D amplifier which includes:
- an amplifier circuits in which a high side switching element and a low side switching element are connected in series with power sources;
- a high side gate driving circuit for driving a high side gate of the high side switching element;
- and a low side gate driving circuit for driving a low side gate of the low side switching element, the high side gate driving circuit and the low side gate driving circuit being configured so that a charging time of the high side gate is set to be shorter than a discharging time of the high side gate, and a charging time of the low side gate is set to be longer than a discharging time of the low side gate.
An apparatus for receiving infrared data, comprising
- a receiving section for receiving audio data which is transmitted in a form of an infrared pulse signal, and
- an amplifier for amplifying an output from the receiving section,
- wherein
- the amplifier includes:
- two amplifier circuits each including a high side switching element and a low side switching element connected in series between power sources;
- two driving circuits each including (i) a high side gate driving circuit for driving a high side gate of the high side switching element and (ii) a low side gate driving circuit for driving a low side gate of the low side switching element, the high side gate driving circuit and the low side gate driving circuit being configured so that a charging time of the high side gate is set to be shorter than a discharging time of the high side gate, and a charging time of the low side gate is set to be longer than a discharging time of the low side gate;
- and
- an inverter circuit for inverting an input signal to be inputted to one of the two driving circuits.
Dependencies are inferred from the claim text.