Multiple circuit blocks with interblock control and power conservation

A data processor comprising:

• a first circuit including a central processing unit which executes a plurality of instructions;
• a second circuit coupled to said first circuit via a holding module and a switch module, and
• a mode control circuit controlling said switch module according to operational mode including a first mode and a second mode,
• wherein said second circuit includes an input/output circuit which couples to said first circuit via data signal lines,
• wherein said holding module is arranged on said data signal lines,
• wherein said data processor includes a first area including said first circuit, and a second area including said second circuit, said holding module and said switch module,
• wherein said first area and said second area are supplied an operational potential in said first mode,
• wherein said first area is cut off from said operational potential and said second area is supplied said operational potential in said second mode, and
• wherein said input/output circuit receives data signals from said holding module via said data signal lines in said second mode.