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US 7,479,681 B2Granted
Multilayered semiconductor structure containing a MISFET, a resistor, a capacitor, and an inductor
AssigneeRenesas Eastern Technology Corp.
InventorsFumitaka Nakayama, Masatoshi Morikawa, Yutaka Hoshino, Tetsuo Uchiyama
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Abstract
A semiconductor device including a MISFET formed in a well at a main surface of a substrate, a second MISFET formed at a main surface of the substrate, and a passive element formed over the main surface of the substrate and having two terminals. A conductive film is formed at a rear face of the semiconductor substrate. The conductive film is connected with a fixed potential and also electrically connected with the conductive film.
Claims1
A semiconductor device comprising, over a semiconductor substrate:
- a MISFET including a source, a drain, and a gate electrode;
- a resistor element;
- a first capacitor element including a first lower electrode and a first upper electrode;
- a second capacitor element including a second lower electrode and a second upper electrode;
- and
- an inductor,
- wherein a first silicon layer and a second silicon layer disposed over the first silicon layer are formed over the semiconductor substrate,
- wherein a first metal layer, a second metal layer disposed over the first metal layer and a third metal layer disposed over the second metal layer are formed over the semiconductor substrate,
- wherein the first silicon layer forms the first lower electrode of the first capacitor element and the resistor element,
- wherein the second silicon layer forms the first upper electrode of the first capacitor element and the gate electrode of the MISFET, and
- wherein the first metal layer forms the second lower electrode of the second capacitor element, the second metal layer forms the second upper electrode of the second capacitor element, and the third metal layer forms the inductor.
8 more elements
Dependencies are inferred from the claim text.