Current aperture transistors and methods of fabricating same
AssigneeCree, Inc.
InventorAdam William Saxler
Life of this patent
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Abstract
Transistors and/or methods of fabricating transistors that include a source contact, drain contact and gate contact are provided. In some embodiments, a channel region is provided between the source and drain contacts and at least a portion of the channel regions includes a hybrid layer comprising semiconductor material. In particular embodiments of the present invention, the transistor is a current aperture transistor. The channel region may include pendeo-epitaxial layers or epitaxial laterally overgrown layers. Transistors and methods of fabricating current aperture transistors that include a trench that extends through the channel and barrier layers and includes semiconductor material therein are also provided.
Claims16
A transistor comprising:
- a mask region on a substrate;
- a first epitaxial laterally overgrown layer comprising semiconductor material of a first conductivity type on the substrate and a portion of the mask region and having spaced apart sidewalls;
- a second epitaxial laterally overgrown layer comprising semiconductor material of a second conductivity type and/or insulating on the first epitaxial laterally overgrown layer comprising semiconductor material and a portion of the mask region and that includes spaced apart portions that extend from the spaced apart sidewalls of the first epitaxial laterally overgrown layer on the mask region, the spaced apart portions having the first conductivity type;
- a third epitaxial laterally overgrown layer comprising unintentionally doped semiconductor material on the second epitaxial laterally overgrown layer and that includes portions that extend from the spaced apart portions and coalesce and are the first conductivity type;
- a channel layer comprising semiconductor material on the third epitaxial laterally overgrown layer;
- a barrier layer on the channel layer;
- a source contact on the barrier layer;
- a gate contact on the barrier layer;
- and
- a drain contact electrically connected to the first layer comprising semiconductor material.
A method of fabricating a transistor comprising:
- forming a mask region on a substrate;
- forming a first epitaxial laterally overgrown layer comprising semiconductor material of a first conductivity type by epitaxial lateral overgrowth on the first layer comprising semiconductor material and a portion of the mask region and having spaced apart sidewalls;
- forming a second epitaxial laterally overgrown layer comprising semiconductor material of a second conductivity type and/or insulating by epitaxial lateral overgrowth on the first epitaxial laterally overgrown layer comprising semiconductor material and a portion of the mask region and that includes spaced apart portions that extend from the spaced apart sidewalls of the first epitaxial laterally overgrown layer on the mask region, the spaced apart portions having the first conductivity type;
- forming a third epitaxial laterally overgrown layer comprising unintentionally doped semiconductor material by epitaxial lateral overgrowth on the second epitaxial laterally overgrown layer and that includes portions that extend from the spaced apart portions and coalesce and are the first conductivity type;
- forming a channel layer comprising semiconductor material on the third epitaxial laterally overgrown layer;
- forming a barrier layer on the channel layer;
- forming a source contact on the barrier layer;
- forming a gate contact on the barrier layer;
- and
- forming a drain contact electrically connected to the first layer comprising semiconductor material.
Dependencies are inferred from the claim text.