Method of forming contact plugs
AssigneeProMOS Technologies Inc.
InventorJung-Wu Chien
Life of this patent
Estimating the term…
Abstract
A method of forming cell bitline contact plugs is disclosed in the present invention. After providing a semiconductor substrate with a first region and a second region, cell bitline contacts are formed at the first region. After forming bitline pattern openings at the second region, poly spacers are formed on sidewalls of the cell bitline contacts and the bitline pattern openings. A substrate contact and a gate contact are then formed within the openings at the second region. After forming a trench around each of the substrate contact and the gate contact by performing an etching process, cell-bitline contact plugs, a substrate contact plug, and a gate contact plug are formed.
Claims7
A method of forming contact plugs, comprising:
- forming a dielectric layer on a semiconductor substrate with a first region and a second region;
- forming a mask layer on the dielectric layer;
- forming at least one first contact in the mask layer and the dielectric layer at the first region;
- forming openings in the mask layer at the second region to expose the dielectric layer;
- forming polysilicon spacers on sidewalls of the openings and partially filling polysilicon in the first contact at the same time, wherein the polysilicon spacers are formed by first depositing a doped polysilicon layer and then etching back the doped silicon layer;
- patterning the dielectric layer exposed by the openings to form a second contact and a third contact within the openings;
- partially etching back the dielectric layer to form a trench around each of the second contact and the third contact by using the mask layer and the polysilicon spacers as an etching mask;
- and
- forming contact plugs in the first contact, the second contact, and the third contact.
Dependencies are inferred from the claim text.