Apparatus and methods for precompiling program sequences for wafer processing

A system for controlling a plurality of hardware devices of a semiconductor processing system via a distributed control system comprising an upper-level controller and a plurality of lower-level controllers coupled with the upper-level controller, the system comprising:

• an upper-level controller comprising one or more processors and one or more memory, wherein at least one of the processors and memory of the upper-level controller are adapted for:
• a) providing a program sequence for the upper-level controller, wherein the program sequence includes a plurality of instructions for controlling one or more of the hardware devices of the processing system via one or more of the lower-level controller(s);
• b) translating a selected one of the instructions into a translated set of instructions that include a translation of the selected instruction and one or more interlock checks for determining whether a condition has been met prior to execution of the translated, selected instruction, wherein the translated set of instructions are executable by a selected lower-level controller;
• and
• c) making the translated set of instructions accessible to the selected lower-level controller so that the selected lower-level controller can execute the translated set of instructions, including the one or more interlock check(s) and the translated, selected instruction;
• and
• a plurality of lower level controllers coupled with the upper-level controller, each lower-level controller comprising one or more processors and one or more memory, wherein at least one of the processors and memory of each lower-level controller are adapted for executing one or more translated instructions that are made accessible to such each lower-level controller, including executing any interlock checks associated with such translated instructions.