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US 7,472,220 B2Granted
Interface circuit system and method for performing power management operations utilizing power management signals
AssigneeMetaram, Inc.
InventorsSuresh Natarajan Rajan, Keith R. Schakel, Michael John Sebastian Smith, David T. Wang, Frederick Daniel Weber
Life of this patent
Estimating the term…
Abstract
A memory circuit power management system and method are provided. In use, an interface circuit is in communication with a plurality of memory circuits and a system. The interface circuit is operable to interface the memory circuits and the system for communicating a first number of power management signals to at least a portion of the memory circuits that is different from a second number of power management signals received from the system.
Claims18
A sub-system, comprising:
- an interface circuit in communication with a plurality of memory circuits and a system, the interface circuit operable to interface the memory circuits and the system for communicating a first number of power management signals to at least a portion of the memory circuits that is different from a second number of power management signals received from the system;
- wherein the interface circuit is further operable for simulating at least one virtual memory circuit.
A method, comprising:
- interfacing a plurality of memory circuits and a system;
- receiving at least one power management signal from the system;
- communicating a different number of power management signals to at least a portion of the memory circuits;
- and
- simulating at least one virtual memory circuit utilizing an interface circuit.
2 more elements
A system, comprising:
- a plurality of memory circuits;
- and
- an interface circuit in communication with the memory circuits and a system, the interface circuit operable to interface the memory circuits and the system for communicating a first number of power management signals to at least a portion of the memory circuits that is different from a second number of power management signals received from the systems;
- wherein the interface circuit is further operable for simulating at least one virtual memory circuit.
1 more element
Dependencies are inferred from the claim text.