Method for countermeasure in an electronic component using a secret key algorithm
AssigneeGemplus
InventorsJean-Sebastien Coron, Nathalie Feyt, Olivier Benoit
Life of this patent
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Abstract
A countermeasure method in an electronic component using a secret key algorithm K on an input message M executes an operation OPN(D) on input data D. A random value, of one first random information U, is generated that is of identical size as the input information D. A second random information V, is calculated by performing an exclusive OR operation between the input information and the first random information U. The operation OPN or the sequence of operations are successively executed on the first input information U and to the second random information V, supplying respectively a first random result OPN(U) and a second random result OPN(V).
Claims14
A countermeasure method in an electronic component that implements the DES cryptographic algorithm in which multiple rounds of calculation are performed on input data, said DES cryptographic algorithm being divided into stages including a plurality of successive rounds,
- wherein each round of calculation in the DES cryptographic algorithm includes at least the following operations:
- a first permutation of data;
- manipulation of the permuted data by a secret key;
- a table look-up operation based on the manipulated data;
- and
- a second permutation of data;
- wherein, for some, but less than all, of said stages of said DES cryptographic algorithm, at least one of said first and second permutations of data comprises the following steps:
- selecting a first random value having the same size as the data being permuted,
- performing an exclusive-OR operation between the data being permuted and the first random value to generate a second random value,
- executing said permutation operation on each of the first and second random values, to generate respective first and second random results, and
- performing an exclusive-OR operation between said first and second random results to produce a final permuted result.
An electronic component that implements the DES cryptographic algorithm in which multiple rounds of calculation are performed on input data, said DES cryptographic algorithm being divided into stages including a plurality of successive rounds, said electronic component including a microprocessor that executes the following operations during each round of calculation in the DES cryptographic algorithm:
- a first permutation of data;
- manipulation of the permuted data by a secret key;
- a table look-up operation based on the manipulated data;
- and
- a second permutation of data;
- wherein, for some, but less than all, of said stages of said DES cryptographic algorithm, said microprocessor executes the following steps for at least one of said first and second permutations of data:
- selecting a first random value having the same size as the data being permuted,
- performing an exclusive-OR operation between the data being permuted and the first random value to generate a second random value,
- executing said permutation operation on each of the first and second random values, to generate respective first and second random results, and
- performing an exclusive-OR operation between said first and second random results to produce a final permuted result.
Dependencies are inferred from the claim text.