Polishing pad and method for manufacture of semiconductor device using the same
AssigneeToyo Tire & Rubber Co., Ltd.
InventorsTetsuo Shimomura, Atsushi Kazuno, Kazuyuki Ogawa, Yoshiyuki Nakai, Masahiko Nakamori, Takatoshi Yamada
Life of this patent
Estimating the term…
Abstract
The present invention provides a polishing pad which imparts excellent planarity and uniformity thereof to a material to be polished, such as a semiconductor wafer, without forming scratches. The present invention relates to a semiconductor wafer polishing pad comprising a polishing layer and a cushion layer, wherein the polishing layer is formed from foamed polyurethane, has a flexural modulus of 250 to 350 MPa, the cushion layer is formed from closed-cell foam and has a thickness of 0.5 to 1.0 mm and a strain constant of 0.01 to 0.08 μm/(gf/cm2).
Claims7
A semiconductor wafer polishing pad comprising a polishing layer and a cushion layer, wherein the polishing layer is formed from foamed polyurethane and has a flexural modulus of 250 to 350 MPa, and the cushion layer is formed from closed-cell foam and has a thickness of 0.5 to 1.0 mm and a strain constant of 0.01 to 0.08 μm/(gf/cm2).
Dependencies are inferred from the claim text.