# US 7,466,004 B2 · Diode structure to suppress parasitic current

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- Number: US 7,466,004 B2
- Document ID: US7466004B2
- Status: Granted
- Kind: B2
- Application number: 11/455,343
- Filed: 2006-06-19
- Published: 2007-12-20
- Granted: 2008-12-16
- Earliest claimed: 2006-06-19
- Assignees: Polar Semiconductor, Inc.
- Inventors: Steven L. Kosier; David M. Elwood
- Web page: https://patentgrep.com/patent/US7466004B2

## CPC

- H10D 84/617: {Combinations of vertical BJTs and only diodes}
- H10D 84/221: {of only diodes}
- H10D: INORGANIC ELECTRIC SEMICONDUCTOR DEVICES

## Abstract

A diode conducts current between an anode terminal and a cathode terminal. The diode includes a parasitic transistor formed between one of the terminals and the substrate. The diode also includes a second transistor that competes with the parasitic transistor to direct current flow between the anode terminal and the cathode terminal.

## Claims

### Claim 1

A diode comprising:
a substrate of a first conductivity type;
an epitaxial region of a second conductivity type adjacent the substrate;
a first terminal;
a second terminal spaced from the first terminal;
a first region of the first conductivity type connected to the first terminal and the epitaxial region;
a second region of the first conductivity type connected to the second terminal and the epitaxial region; and
a third region of the second conductivity type connected to the second terminal and the epitaxial region.

### Claim 2 (depends on 1)

The diode of claim 1, further comprising a third terminal electrically connected to the substrate.

### Claim 3 (depends on 1)

The diode of claim 1, wherein the second region is located between the third region and the first region.

### Claim 4 (depends on 1)

The diode of claim 1, wherein the third region is located between the second region and the first region.

### Claim 5 (depends on 1)

The diode of claim 1, further comprising an electrically insulating region between the first region and the second region.

### Claim 6 (depends on 1)

The diode of claim 1, wherein each of the first region, the second region, the third region, and the second terminal form a ring around the first terminal.

### Claim 7 (depends on 1)

The diode of claim 1, wherein the second region comprises a plurality of regions of the first conductivity type.

### Claim 8 (depends on 1)

The diode of claim 1, wherein the third region comprises a plurality of regions of the second conductivity type.

### Claim 9

A diode for conducting current between a first terminal and a second terminal, the diode comprising:
a substrate;
an epitaxial region of a first conductivity type adjacent the substrate;
a first doped region of a second conductivity type connected to the first terminal and the epitaxial region; and
means for passing, current from the epitaxial region to the second terminal to divert current from an undesired location.

### Claim 10 (depends on 9)

The diode of claim 9, wherein the means for passing current from the epitaxial region to the second terminal comprises a second doped region of the first conductivity type connected to the second terminal and the epitaxial region.

### Claim 11 (depends on 9)

The diode of claim 9, the means for passing current from the epitaxial region to the second terminal comprises a third doped region of the second conductivity type connected to the second terminal and the epitaxial region.

### Claim 12 (depends on 9)

The diode of claim 9, wherein the means for passing current from the epitaxial region to the second terminal comprises:
a second doped region of the first conductivity type connected to the second terminal and the epitaxial region; and
a third doped region of the second conductivity type connected to the second terminal and the epitaxial region.

### Claim 13 (depends on 12)

The diode of claim 12, wherein the second terminal comprises a metal layer connected to the second doped region and the third doped region.

### Claim 14

A diode comprising:
a substrate of a first conductivity type;
an epitaxial region of a second conductivity type adjacent the substrate;
a first terminal adjacent the epitaxial region;
a second terminal adjacent the epitaxial region and spaced from the first terminal;
a first transistor comprising:
a first region of the first conductivity type;
the epitaxial region connected to the first region; and
the substrate connected to the epitaxial region;
a second transistor comprising:
the first region;
the epitaxial region connected to the first region; and
a second region of the first conductivity type, connected to the epitaxial region and the second terminal and spaced from the first region; and
a third region of the second conductivity type, connected to the epitaxial region and the second terminal.

### Claim 15 (depends on 14)

The diode of claim 14, wherein the first transistor and the second transistor are pnp transistors.

### Claim 16 (depends on 14)

The diode of claim 14, wherein a doping concentration of the third region is greater than a doping concentration of the epitaxial region.

### Claim 17 (depends on 14)

The diode of claim 14, further comprising a third terminal electrically connected to the substrate.

### Claim 18 (depends on 14)

The diode of claim 14, further comprising a buried layer between the substrate and the epitaxial region.

### Claim 19 (depends on 14)

The diode of claim 14, further comprising an electrically insulating region between the first region and the third region.
