Skip counter for system timer
AssigneeTexas Instruments Incorporated
InventorVitaly Andrianov
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AssigneeTexas Instruments Incorporated
InventorVitaly Andrianov
Estimating the term…
A skip counter timing device employing a typical hardware system timer, a skip counter with a skip count register, a signal gate and a hardware system tick counter as a single sleep mode enhancing skip counter. In an exemplary embodiment, said skip counter is operatively interconnected to a legacy operating system, with said operating system being configured for said interconnection. Use of said skip counter provides the benefits of: 1) allowing CPU shutdown during device sleep modes while 2) eliminating the need for the CPU to perform fractional mathematical calculations in recalculating accurate timer settings upon factional time-slice timer interrupt firings at CPU restarts and thus 3) avoiding overloading CPU resources at said restarts and 4) eliminating incremental and cumulative inaccuracies associated with recalculating timer settings in dynamic timer-managed systems.
A method of maintaining accuracy in a system of dynamic timers within an electronic operating system utilizing a skip counter timing device operatively integrated into said operating system which, among other things, provides a skip time set value and receives a conditional timer interrupt signal, wherein:
A method of enabling a Central Processing Unit (CPU) utilizing a system of dynamic timers within an electronic operating system to shut down between dynamic timer interrupts by utilizing a skip counter timing device operatively integrated into said operating system which, among other things, provides a skip time set value, receives a conditional timer interrupt signal and receives a system tick count, wherein:
Dependencies are inferred from the claim text.