Deferred branch history update scheme
AssigneeSun Microsystems, Inc.
InventorsAbid Ali, Jiejun Lu, Brian F. Keish
Life of this patent
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AssigneeSun Microsystems, Inc.
InventorsAbid Ali, Jiejun Lu, Brian F. Keish
Estimating the term…
In one embodiment, a processor comprises a branch prediction array, an index generator coupled to the branch prediction array, and a control unit coupled to the index generator. The branch prediction array is configured to store a plurality of branch predictions for conditional branches. The index generator is configured to generate an index to the branch prediction array responsive to at least a portion of a fetch address corresponding to a fetch request that is at a first pipeline stage of the processor and further responsive to a branch history. The control unit is configured to update the branch history responsive to a first fetch request at the first pipeline stage and to defer the update for a second fetch request to a second pipeline stage subsequent to the first pipeline stage.
A processor comprising:
A method comprising:
A processor comprising:
Dependencies are inferred from the claim text.