Memory controller
AssigneeHewlett-Packard Development Company, L.P.
InventorsJorge Antonio Sved, Neil Thomas Hutchon, Anthony James C Cole
Life of this patent
Estimating the term…
Abstract
A memory controller for accessing a memory module comprising a plurality of memory banks. The memory controller is operable to write copies of program data to one or more memory banks according to the size of the program data. The memory controller is additionally operable to read program data, e.g. in response to an access request, from whichever memory bank is next available for access.
Claims6
A memory controller for coupling to a first memory bank and to a second memory bank, each memory bank storing identical program data, the memory controller being operable to read program data from whichever memory bank is next available for access, wherein the memory controller is further operable to:
- receive a request to write program data;
- write the program data to the first memory bank;
- and
- write the program data to the second memory bank if the size of the program data is not greater than half the size of the first memory bank.
A memory controller for coupling to a first memory bank and a second memory bank, the memory controller being operable to:
- receive a request to write program data;
- in response to receipt of the request to write program data, place two write requests into a command-queue buffer, one of the write requests including an address to the first memory bank and the other of the write requests including an address to the second memory bank;
- in response to receipt of the request to write program data, place two copies of the program data into a write-queue buffer, each copy of the program data corresponding to one of the write requests placed in the command-queue buffer;
- write the program data to the first memory bank;
- and
- write the program data to the second memory bank.
Dependencies are inferred from the claim text.