Data handover unit for transferring data between different clock domains by parallelly reading out data bits from a plurality of storage elements

A data handover unit for transferring data from a first clock domain to a second clock domain, comprising:

• a first clock unit configured to supply first clock signals each having a first clock frequency, wherein the first clock signals each have a predetermined phase shift with regard to the other first clock signals;
• a selector stage including a plurality of selector circuits, wherein each selector circuit is configured to sample an incoming data stream with respect to a respective one of the first clock signals to obtain a respective sampled data substream;
• a second clock unit configured to supply a second clock signal;
• a storage unit comprising a first plurality of storage elements, wherein each storage element is configured to store one data bit of the sampled data substreams, wherein the first plurality of storage elements are configured in a plurality of storage element groups, wherein each storage element group is associated to one of the sampled data substreams such that the respective sampled data substream is latched into the storage elements of the respective storage element group;
• and
• an output unit for parallelly reading out a frame of data bits from a second plurality of storage elements within the first plurality of storage elements, with respect to the second clock signal,
• wherein the selector circuits are further configured to successively write the data bits of the respective sampled data substreams into the storage elements of the respective storage element group and wherein the respective data bits of the sampled data substream are stored in the respective storage elements at least until read out by the output unit.

A method for operating a data handover unit for transferring data from a first clock domain to a second clock domain, the method comprising:

• receiving an incoming data stream synchronized to a first clock signal;
• sampling the incoming data stream with respect to the first clock signal;
• successively storing data bits of the sampled data stream in a first plurality of storage elements with respect to the first clock signal;
• and
• parallelly reading out a frame of data bits from a second plurality of storage elements within the first plurality of the storage elements with respect to the second clock signal, wherein the respective data bits of the sampled data stream are kept stored in the respective storage elements at least until read out parallelly as the frame of data bits.

A method for operating a data handover unit for transferring data from a first clock domain to a second clock domain, comprising:

• providing a plurality of first clock signals each having a first clock frequency, wherein the first clock signals each have a predetermined phase shift with respect to the other first clock signals;
• sampling the incoming data stream with respect to one of the first clock signals to obtain a respective sampled data substream;
• providing a second clock signal;
• storing data bits of each respective sampled data substreams in a first plurality of storage elements;
• and
• parallelly reading out a frame of data bits from a second plurality of storage elements within the first plurality of storage elements, with respect to the second clock signal;
• wherein the data bits of the respective sampled data substreams are successively written into storage element groups, wherein each storage element group is respectively associated to one of the sampled data substreams;
• and
• wherein the respective data bits of the sampled data substream are stored in the storage elements of the respective storage element groups at least until read out.